Complementary Phototransistor Pixel for In-Sensor Computing
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Solution Overview
Problem
Existing sensing and computing architectures face challenges in efficiently implementing positive and negative weights and achieving high computational parallelism due to complex array structures and operation methods.
Innovation Solution
A complementary phototransistor pixel unit and array structure that utilize ultra-thin body and buried oxide layer (UTBB) photoelectric field effect transistors to simultaneously calculate positive and negative weight values, enabling high parallel vector-matrix multiplication and convolution operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different readout and control circuits are designed to implement positive and negative weights, then the calculation of positive and negative weight values is enabled, but the complexity of the array structure increases
Solution Approach 1:
The patent uses a single phototransistor pixel unit that can perform both positive and negative weight calculations by controlling the polarity of the applied voltage. The same hardware structure handles both cases, eliminating the need for separate readout and control circuits for positive and negative weights, thus reducing array structure complexity while maintaining versatility
Solution Approach 2:
The patent changes the voltage polarity parameter to switch between positive and negative weight calculations. By applying positive or negative voltage to the phototransistor, the same device can compute different weight values without requiring structural modifications, thereby simplifying the array architecture
2Adaptability or versatility
If complex array interconnection structure and timing operations are used to meet the requirements of reusing the operational matrix, then the operational matrix reuse is enabled, but the computational parallelism decreases
Solution Approach 1:
The patent employs periodic timing operations with distinct phases (exposure phase and readout phase) that enable the operational matrix to be reused. During the exposure phase, phototransistors integrate light signals; during the readout phase, results are read and the matrix can be reconfigured for the next operation. This periodic operation allows matrix reuse without complex interconnection structures, maintaining high computational parallelism
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution simplifies the complexity of array structures and operation methods, improves operational parallelism, and allows for the reuse of operational matrices, enhancing the efficiency of in-sensor computing applications.
Implementation Method 1
a first photoelectric field effect transistor, where the first photoelectric field effect transistor is a photoelectric field effect transistor based on an ultra-thin body and buried oxide layer (UTBB)
Data Source
AI summary
The present disclosure provides a complementary phototransistor pixel unit, a sensing and computing array structure and an operation method thereof. The complementary phototransistor pixel unit includes: a first photoelectric field effect transistor, which is a photoelectric field effect transistor based on an ultra-thin body and buried oxide layer; and a second photoelectric field effect transistor, the second photoelectric field effect transistor is a photoelectric field effect transistor based on an ultra-thin body and buried oxide layer, each of the first photoelectric field effect transistor and the second photoelectric field effect transistor is four-end device and has a gate electrode G, a source electrode S, a drain electrode D, and a well base electrode B, and the source electrode S or drain electrode D of the first photoelectric field effect transistor is connected to the source electrode S or drain electrode D of the second photoelectric field effect transistor.