Complementary Signal Generator With Capacitance Compensation for Low Skew
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Solution Overview
Problem
Complementary signal generators in integrated circuits face challenges in reducing skew and its variations across different process, voltage, and temperature (PVT) conditions, especially as the frequency of operation increases.
Innovation Solution
A circuit design featuring a first string of inverters with an even number of series inverters producing a true signal and a second string with an odd number of series inverters producing a complement signal, with a compensation capacitance circuit connected to the node with the smaller number of inverters, emulating junction and overlap capacitance to reduce skew and its variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a pass gate is added to the inverter string producing the true signal to reduce skew, then skew is reduced, but skew suffers substantial variation in different PVT conditions
Solution Approach 1:
The patent changes the electrical parameters of the inverter strings by adding compensation capacitance to adjust the propagation delay. This modifies the RC time constants of the inverter stages to balance the delays between true and complement signal paths, achieving skew reduction that is less sensitive to PVT variations
Solution Approach 2:
The compensation capacitance acts as an intermediary element that mediates the delay difference between the two inverter strings. By introducing this additional capacitive element, the patent creates a adjustable delay mechanism that compensates for the inherent delay mismatch without requiring complex circuit modifications
2Productivity
If the frequency of operation is increased to improve productivity, then productivity increases, but skew becomes more critical
Solution Approach 1:
The patent applies preliminary action by pre-compensating for delay differences through the compensation capacitance before the signals are used. This advance adjustment ensures that even at higher frequencies where skew becomes more critical, the complementary signals remain balanced and meet timing requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces skew and its variations across PVT conditions, improving the performance of complementary signal generators by matching delays between true and complement signals.
Implementation Method 1
A compensation capacitance circuit is connected to a node in the one of the first and second strings having the smaller number of inverters. The compensation capacitance circuit can include a component emulating junction and overlap capacitance of one of the inverters
Data Source
AI summary
A circuit to generate complementary signals comprises a first string of inverters with two inverters in series to produce a true signal in response to an input signal, and a second string of inverters with three inverters in series to produce a complement signal in response to the input signal. A compensation capacitance circuit is connected to a node in the first string of inverters. The compensation capacitance circuit can add capacitance to the node to increase a resistance-capacitance RC delay at the node in a manner which emulates the delay across PVT conditions an inverter in the second string of inverters.