Composite Column Interconnect Structure for Wafer Stress Reduction

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Solution Overview

Problem

Conventional semiconductor device interconnect structures experience mechanical and thermal stress, leading to delamination of interlayer dielectric and potential device failure due to the height of conductive pillars.

Innovation Solution

A column interconnect structure is formed using a first conductive material with a second conductive material disposed within its interior region, extending above the first material, which provides additional strength and reduces stress by using a lower modulus inner core and a higher strength outer column.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conductive pillars are made taller to achieve smaller interconnect pitch, then device density increases, but mechanical and thermal stress increases causing delamination and device failure

Engineering Contradiction:
Improvedevice densityVSAvoidinterconnect structure reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The conductive pillar is constructed as a composite structure with an inner core of first conductive material and an outer shell of second conductive material. The inner core material is selected to have a lower modulus of elasticity than the outer shell material, allowing the core to flex and absorb mechanical and thermal stress while the outer shell provides structural strength and electrical conductivity. This composite configuration enables taller pillars for higher device density while preventing delamination and failure.

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If conductive pillar height is increased to reduce interconnect pitch, then manufacturing precision improves, but stress on interlayer dielectric increases causing delamination

Engineering Contradiction:
Improveinterconnect pitchVSAvoidwafer stress
Core Design Contradiction:
Manufacturing precisionVSStress or pressure

Solution Approach 1:

The dual-material conductive pillar structure allows optimization of each material's properties: the inner core uses material with lower modulus to reduce stress concentration, while the outer shell uses material with higher strength and conductivity. This composite approach enables precise interconnect pitch control through taller pillars without causing interlayer dielectric delamination.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

Different regions of the conductive pillar are assigned different material properties: the inner core region contains material optimized for stress relief (lower modulus), while the outer shell region contains material optimized for strength and conductivity. This local differentiation of material quality allows the pillar to simultaneously achieve height for precision while managing stress locally throughout its structure.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8901734B2Semiconductor device and method of forming column interconnect structure to reduce wafer stress
Publication Date: 2014.12.02 STATS CHIPPAC MANAGEMENT PTE LTD
  • US8901734B2 patent drawing
  • US8901734B2 patent drawing
  • US8901734B2 patent drawing

AI summary

An interconnect pad is formed over a first substrate. A photoresist layer is formed over the first substrate and interconnect pad. A portion of the photoresist layer is removed to form a channel and expose a perimeter of the interconnect pad while leaving the photoresist layer covering a central area of the interconnect pad. A first conductive material is deposited in the channel of the photoresist layer to form a column of conductive material. The remainder of the photoresist layer is removed. A masking layer is formed around the column of conductive material while exposing the interconnect pad within the column of conductive material. A second conductive material is deposited over the first conductive layer. The second conductive material extends above the column of conductive material. The masking layer is removed. The second conductive material is reflowed to form a column interconnect structure over the semiconductor device.