Compressed Configuration Data in Semiconductor Fuse Arrays
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Solution Overview
Problem
As device complexity increases, particularly in multi-core microprocessors, the need for configuration data storage on a single die faces challenges due to real estate and power constraints, with existing fuse arrays becoming inefficient in terms of space and reliability.
Innovation Solution
The implementation of a compressed configuration data system in a fuse array for multi-core devices, utilizing compression and decompression algorithms to reduce the number of fuses required while enabling more data storage, and incorporating redundant fuse arrays for reliability and reconfiguration capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional fuse arrays are used to store configuration data in multi-core devices, then configuration data can be stored and provided, but real estate and power consumption increase significantly
Solution Approach 1:
Multiple fuse arrays are merged into a single shared fuse array that serves all cores. The configuration data is compressed and stored once in the shared array, then decompressed and distributed to multiple cores, eliminating the need for separate fuse arrays for each core.
Solution Approach 2:
The invention changes the state of configuration data from uncompressed to compressed form before storage. By applying compression algorithms, the same amount of configuration information is stored in fewer fuses, reducing the real estate requirement while maintaining full functionality.
2Area of stationary object
If fuse array size is reduced to save real estate, then fewer fuses are available, but configuration data storage capacity and reliability decrease
Solution Approach 1:
Redundant fuse arrays are implemented as a backup mechanism. The system includes additional fuses beyond the minimum required for configuration storage, which can be used for error correction, redundancy, or reconfiguration if primary fuses fail, thereby cushioning against reliability issues.
Solution Approach 2:
Configuration data is copied and stored in multiple locations within the fuse array structure. The compressed data can be replicated across different storage regions, and redundant copies ensure that if one copy becomes corrupted or inaccessible, other copies remain available.
3Quantity of substance
If more configuration data is stored to support increased device complexity, then more fuses are required, but real estate constraints are violated
Solution Approach 1:
Compression algorithms transform the parameter of data volume into a more compact form. By changing the encoding of configuration data from uncompressed to compressed representation, the system can store significantly more configuration information in the same physical space, or the same amount of data in less space.
Solution Approach 2:
The invention introduces a new dimension of data organization through compression and decompression stages. Instead of directly mapping configuration data to fuse arrays in a one-to-one relationship, the system adds computational dimensions (compression/decompression processes) that allow much higher data density in the physical fuse array.
4Quantity of substance
If fuse arrays are made larger to accommodate more configuration data, then more power is consumed, but power consumption increases
Solution Approach 1:
Multiple fuse arrays are merged into a single shared array, reducing the total number of fuse elements required. Since each fuse element consumes power during read operations, consolidating into fewer fuses directly reduces the overall power consumption of the configuration storage system.
Solution Approach 2:
By compressing configuration data before storage, the system reduces the number of fuses that need to be read and processed during initialization. This parameter change from uncompressed to compressed data representation directly reduces the power consumption associated with fuse array access operations.
Data Source
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AI summary
An apparatus includes a semiconductor fuse array, a cache memory, and a plurality of cores. The semiconductor fuse array is disposed on a die, into which is programmed the configuration data. The semiconductor fuse array has a first plurality of semiconductor fuses that is configured to store compressed cache correction data. The a cache memory is disposed on the die. The plurality of cores is disposed on the die, where each of the plurality of cores is coupled to the semiconductor fuse array and the cache memory, and is configured to access the semiconductor fuse array upon power-up/reset, to decompress the compressed cache correction data, and to distribute decompressed cached correction data to initialize the cache memory.