Compute-In-Memory Circuits With Shared Pipelined Adder Trees
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Solution Overview
Problem
Conventional digital computing-in-memory (dCIM) systems face challenges with large layout area due to numerous adder trees and slow performance due to long memory content download times, necessitating a solution that reduces adder trees and enables faster weight downloading.
Innovation Solution
Implement a compute-in-memory circuit with tri-state multipliers and shared adder trees, allowing simultaneous multiplication and accumulation operations across subgroups, and utilize pipelined adder trees to reduce latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If each subgroup has a corresponding adder tree in conventional dCIM systems, then multiplication and accumulation operations can be performed, but the layout area becomes large and space is wasted
Solution Approach 1:
Multiple adder trees are merged into a single shared adder tree that serves multiple subgroups. The adder tree is equipped with multiplexers that selectively connect to different subgroups, allowing one adder tree to handle accumulation operations for multiple subgroups sequentially, thereby reducing the total number of adder trees and the overall layout area.
Solution Approach 2:
The adder tree is designed to perform multiple functions by serving different subgroups at different times. Through timing control signals and multiplexer switching, a single adder tree universally handles accumulation operations for all subgroups, eliminating the need for dedicated adder trees for each subgroup.
2Adaptability or versatility
If several or all wordlines are toggled to download memory content in dCIM systems, then weights can be updated, but the download time becomes long and performance degrades
Solution Approach 1:
The memory array is divided into multiple subgroups, each with its own wordlines. This segmentation allows selective activation of wordlines for specific subgroups during weight downloading, rather than toggling all wordlines simultaneously. The controller can download weights to one subgroup while other subgroups continue computation, reducing overall download time.
Solution Approach 2:
The system enables continuous operation by allowing computation in some subgroups to proceed while weight downloading occurs in other subgroups. This pipelined approach ensures that useful actions (computation and downloading) continue simultaneously without idle periods, improving overall system throughput and reducing effective download time.
Data Source
AI summary
A compute-in-memory circuit is provided. The circuit includes one or more input lines receiving M input data elements, M being greater than zero, an array of memory cells including one or more subgroups, each subgroup of the one or more subgroups storing M stored data elements, multiplier circuits connected to the array of memory cells and to the one or more input lines, and configured to multiply the M input data elements by the M stored data elements in a selected subgroup of the one or more subgroups and configured to provide a multiplier output having M data elements, and accumulation circuitry including an accumulator input of M data elements connected to the multiplier output and configured to generate a sum of the M data elements of the multiplier output, wherein the multiplier circuits supply a multiplication result to the multiplier output from subgroups.