Concatenated Error Correction for Non-Volatile Memory Errors
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Solution Overview
Problem
Conventional error correction techniques in non-volatile memory, such as flash EEPROM memory, are inadequate as they primarily address one-directional errors, failing to correct errors that are not strictly one-directional, rendering them of limited practical value in real systems.
Innovation Solution
The implementation of a concatenated error correction system that includes an outer encoder for generating a code word, a parity circuit for computing parities, an inner encoder for generating error correction bits, and a method for multiplexing and outputting logical cells with error correction bits, enabling asymmetric and symmetric error correction to address both one-directional and non-one-directional errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional asymmetric error correction code is used, then one-directional errors can be corrected, but non-one-directional errors cannot be corrected
Solution Approach 1:
The error correction system is segmented into two independent codes: an asymmetric error correction code for one-directional errors and a symmetric error correction code for non-one-directional errors. Each code segment handles specific error types, together providing comprehensive error correction coverage that neither code could achieve alone.
Solution Approach 2:
The patent combines two different error correction codes (asymmetric and symmetric) into a composite error correction system. This composite approach leverages the strengths of both code types to correct various error patterns, analogous to using composite materials to achieve properties that single materials cannot provide.
2Ease of manufacture
If only asymmetric error correction code is used, then the encoding process is simple, but the error correction effectiveness is limited
Solution Approach 1:
The encoding process is divided into two independent stages: asymmetric error correction encoding and symmetric error correction encoding. Each stage can be implemented separately with its own simplicity, while together they provide enhanced error correction effectiveness that overcomes the limitations of using either code alone.
3Reliability
If concatenated error correction system is implemented, then both one-directional and non-one-directional errors can be corrected, but the device complexity increases
Solution Approach 1:
The encoder is segmented into independent asymmetric and symmetric error correction modules that can be implemented separately. This modular segmentation allows each module to be optimized independently while maintaining overall system manageability, reducing the practical complexity burden despite the enhanced error correction capability.
Solution Approach 2:
The concatenated error correction system provides multi-functionality by handling both one-directional and non-one-directional errors within a unified encoding framework. This universal approach consolidates error correction functions into a single system that addresses diverse error types, potentially reducing overall system complexity compared to implementing separate correction systems for different error types.
Data Source
AI summary
A system and method is provided for performing concatenated error correction. In one implementation, an apparatus for encoding data includes an outer encoder to generate a code word corresponding to received input data and a parity circuit to compute parities of logical cells of data, the logical cells of data being obtained from the code word and having a first logical cell. The apparatus also includes an inner encoder to generate an error correction bit for the first logical cell based on a first parity corresponding to the first logical cell, and to insert the error correction bit in the first logical cell.