Semiconductor Interconnection Pillars With Concave Bonding Surfaces
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Solution Overview
Problem
Traditional interconnection pillars in semiconductor devices suffer from void formation due to solder material being drawn to the edges of bonding surfaces, leading to increased bond failure risk and reduced interconnection performance, which complicates assembly and increases resistance.
Innovation Solution
The interconnection pillars are designed with solder material on the exterior surfaces, excluding it from the bonding surfaces, allowing the solder to flow towards the center during assembly, thereby reducing void formation and enhancing structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If solder material is placed between opposing surfaces of interconnection pillars during bonding, then the pillars can be joined together, but solder is drawn to the edges during heating, creating voids in the center that reduce bond strength and increase resistance
Solution Approach 1:
The patent applies preliminary action by pre-forming concave bonding surfaces on the interconnection pillars before the bonding process. This pre-shaping of the surfaces guides the solder flow during heating, preventing void formation in the center and ensuring uniform solder distribution, thereby maintaining bond strength and reducing failure risk
Solution Approach 2:
The patent implements local quality by creating non-planar (concave) bonding surfaces with specific geometric features tailored to control solder flow in critical areas. The concave geometry concentrates solder in the center region during bonding, ensuring adequate material presence where needed while preventing edge accumulation, thus resolving the void formation issue
2Area of stationary object
If interconnection pillars are made smaller to reduce assembly space, then space occupation decreases, but physical strength and current carrying capacity are reduced
Solution Approach 1:
The patent applies curvature by forming concave bonding surfaces on the pillar ends, creating a curved geometry that increases the effective bonding area and improves solder wetting. This curved surface design allows smaller pillars to achieve adequate bond strength by enhancing the interaction between solder and pillar surface, compensating for the reduced size
3Ease of manufacture
If traditional bonding surfaces are used, then assembly process is simple, but void formation occurs and assembly height control is inaccurate
Solution Approach 1:
The patent applies preliminary action by pre-forming the concave bonding surfaces and positioning features on pillars before assembly. These pre-formed features automatically guide the alignment and height positioning during bonding, achieving accurate assembly height control without complex real-time adjustment mechanisms, thus maintaining manufacturing simplicity while improving precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces or eliminates solder voiding and squeeze-out, allowing for more accurate assembly height control, narrower interconnection structures, and improved electrical and physical integrity.
Implementation Method 1
the solder material forming the exterior of the first and/or second interconnection structure portions can flow from the outside thereof to between the bonding surfaces
Implementation Method 2
When the solder material is heated to bond the pillar portions together
Data Source
AI summary
In some embodiments, an interconnection structure can electrically and physically couple a first semiconductor die and a second semiconductor die. The interconnection structure can include a first portion at the first semiconductor die and a second portion at the second semiconductor die. The first portion can include a first conductive pillar with a concave bonding surface, a first annular barrier layer, and a first annular solder layer. The first annular barrier layer can surround a sidewall of the first conductive pillar, and the first annular solder layer can surround the first barrier layer. The second portion can include a second conductive pillar having a convex bonding surface, the convex bonding surface coupled to the concave bonding surface. The second interconnection structure can further include a second annular solder layer surrounding a second annular barrier layer surrounding the second conductive pillar.