Concave Substrate Coplanar Structure for LTPS Display Uniformity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display devices face challenges in achieving high reliability due to issues with electrical resistance and uniformity of semiconductor layers, particularly in low temperature polysilicon (LTPS) processes, which can result in non-uniform polysilicon formation and residual images.
Innovation Solution
A display device design featuring a substrate with a concave portion and a lower conductive layer embedded within, where the top surface of the conductive layer is coplanar with the substrate, reducing electrical resistance and enabling uniform semiconductor layer formation through the use of a coplanar structure that eliminates step differences and enhances manufacturing quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional flat substrate structure is used, then the manufacturing process is simple, but the electrical resistance is high and polysilicon formation is non-uniform
Solution Approach 1:
The patent introduces a vertical dimension by forming a concave portion in the substrate, transforming the conventional flat two-dimensional structure into a three-dimensional structure. This dimensional change allows the lower conductive layer to be positioned deeper in the concave portion, reducing its exposure to plasma and thereby reducing electrical resistance and preventing residual images while maintaining manufacturing feasibility
Solution Approach 2:
The patent applies local quality by creating a non-uniform substrate structure with a concave portion only in specific regions where the lower conductive layer is positioned. This localized structural modification allows different regions of the substrate to have different properties: the concave region provides reduced electrical resistance and uniform polysilicon formation, while other regions maintain the original flat structure for simple manufacturing
2Manufacturing precision
If the lower conductive layer is exposed on the substrate surface, then the electrical connection is straightforward, but the polysilicon layer formation becomes non-uniform causing residual images
Solution Approach 1:
The patent uses dimensional change by recessing the lower conductive layer into the substrate's concave portion rather than keeping it exposed on the surface. This vertical positioning adjustment allows the polysilicon layer to be formed uniformly over the conductive layer without direct plasma exposure issues, while the conductive layer remains electrically connected through the concave structure
Solution Approach 2:
The patent applies the nesting principle by placing the lower conductive layer inside the concave portion of the substrate, effectively nesting the conductive layer within the substrate structure. This nesting protects the conductive layer from direct plasma exposure during polysilicon formation while maintaining electrical connectivity, solving both uniformity and manufacturing ease concerns
3Productivity
If LTPS process is used for TFT fabrication, then the display device can be manufactured, but non-uniform polysilicon formation occurs leading to residual images
Solution Approach 1:
The patent applies preliminary action by pre-forming the concave portion in the substrate before depositing the lower conductive layer and subsequent polysilicon layer. This preliminary structural preparation ensures that when the LTPS process is used, the polysilicon forms uniformly without direct plasma exposure to the conductive layer, preventing residual images while maintaining manufacturing efficiency
Solution Approach 2:
The patent resolves the LTPS process issue by introducing a vertical dimension through the concave portion, allowing the polysilicon layer to be formed uniformly at a different vertical level than the conductive layer. This dimensional separation prevents plasma-related non-uniformity while maintaining the productivity benefits of the LTPS process
Data Source
AI summary
A display device includes a substrate defining a concave portion recessed from a top surface of the substrate, a lower conductive layer in the concave portion, an upper conductive layer connected to the lower conductive layer, an insulating layer between the lower conductive layer and the upper conductive layer and in which a contact hole is defined, the upper conductive layer connected to the lower conductive layer at the contact hole, a thin-film transistor including a semiconductor layer and a gate electrode on the semiconductor layer, and a display element connected to the thin-film transistor.