Concentrated Amplifier Transistor Arrangement for DRAM Voltage Generators
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Solution Overview
Problem
In miniaturized DRAM and SDRAM applications, process deviations in reference voltage generators can lead to performance issues due to variations in physical and electrical characteristics of circuit components, affecting signal detection and overall memory performance.
Innovation Solution
The solution involves grouping transistors in the reference voltage generator circuit by physical characteristics, allowing for contemporaneous fabrication and proximity, which reduces deviations among transistors intended to have similar characteristics, thereby minimizing doping differences and reducing the need for dummy transistors to separate different types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If transistors are miniaturized to continue scaling, then device density and integration are improved, but process deviations and performance variability worsen
Solution Approach 1:
The patent merges transistors with different types (e.g., n-type and p-type) into a single shared well structure, allowing them to be fabricated simultaneously in the same process run. This consolidation ensures that all transistors experience identical process conditions, thereby reducing manufacturing precision issues caused by miniaturization while maintaining high device density.
2Adaptability or versatility
If transistors are fabricated at different times or in different locations, then design flexibility is improved, but performance matching and reliability worsen
Solution Approach 1:
The patent establishes a shared well structure in advance that is designed to accommodate multiple transistor types. This preliminary action ensures that all transistors are pre-configured to be fabricated simultaneously in the same location, guaranteeing performance matching while still allowing design flexibility in terms of transistor arrangement and type distribution within the shared well.
3Manufacturing precision
If dummy transistors are added to separate different transistor types, then process deviation is reduced, but device complexity and area increase
Solution Approach 1:
The patent extracts and eliminates the need for dummy transistors by implementing a shared well structure where different transistor types are directly integrated together. This removal of dummy transistors simplifies the device structure and reduces area while maintaining manufacturing precision, as all transistors are fabricated in the same process run without requiring separation elements.
Data Source
AI summary
Apparatuses and methods for concentrated arrangement of amplifiers. An example apparatus may include a first amplifier circuit including a first and second transistors. The first width different from the second width, the first length different from the second length. The apparatus further including a second amplifier circuit including a third and fourth transistors. The first transistor including a first gate electrode and the third transistor having a third gate electrode each having a first length and a first diffusion region and a third diffusion region, respectively, each having a first width, and the second transistor including a second gate electrode and the fourth transistor having a fourth gate electrode each with a fourth length and a second diffusion region and a fourth diffusion region, respectively, each having a second width. The first and third transistors are collectively arranged and the second and fourth transistors are collectively arranged.