Concurrent Master-Slave SoC Testing via Signal Isolation
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Solution Overview
Problem
System on a Chip (SoC) with complex embedded slave systems, such as integrated radios, incur costly test times when microcontroller unit (MCU) and slave systems are tested serially, necessitating a method for concurrent testing of heterogeneous blocks with different test requirements.
Innovation Solution
The solution involves isolating the slave system from the master system by blocking reset signals and interrupts, using a separate clock signal, and allowing both systems to be tested in parallel, enabling the master system to perform its own tests, including testing built-in flash memory, while the slave system is isolated.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If serial testing of master and slave systems is used, then test simplicity is maintained, but testing time increases significantly
Solution Approach 1:
The system is divided into independent master and slave testing domains. The master system can be tested independently from the slave system by blocking reset signals and interrupts, allowing parallel execution of tests. This segmentation enables concurrent testing of heterogeneous blocks with different test requirements, significantly reducing total testing time while maintaining test simplicity through modular isolation mechanisms.
2Productivity
If concurrent testing of master and slave systems is implemented, then testing time is reduced, but system isolation complexity increases
Solution Approach 1:
A test isolation mechanism acts as an intermediary between the master and slave systems. This intermediary blocks reset signals and interrupts from the master system to the slave system during concurrent testing, enabling independent test execution. The intermediary mechanism provides the necessary isolation to achieve parallel testing efficiency without requiring complex system-wide reconfiguration.
Solution Approach 2:
The test isolation mechanism dynamically adjusts system connectivity based on testing requirements. During concurrent testing, the isolation mechanism activates to block master-slave communication, enabling parallel tests. When testing completes, the isolation is removed to restore normal operation. This dynamic behavior allows the system to switch between isolated test modes and normal operational modes seamlessly.
3Adaptability or versatility
If separate clock signals are used for master and slave systems during testing, then testing independence is improved, but signal synchronization complexity increases
Solution Approach 1:
Each system (master and slave) is provided with its own dedicated clock signal tailored to its specific testing requirements. The master system receives a first clock signal optimized for master tests, while the slave system receives a second clock signal optimized for slave tests. This local quality approach allows each system to operate independently with appropriate timing characteristics, enhancing test configuration flexibility and adaptability.
Data Source
AI summary
An integrated circuit includes a substrate, a master system on the substrate, a slave system on the substrate that is coupled to communicate with the master system, a first clock signal coupled to the master system, and a second clock signal coupled to the slave system. The master system is configured to isolate the slave system from the master system while a first test of the master system is conducted in parallel with a second test of the slave system. The master system uses the first clock signal during the first test and the slave system uses the second clock signal during the second test.