Conductive Bonding Layer and Via Structure for Optoelectronic Components

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Solution Overview

Problem

Existing optoelectronic components face challenges in achieving good current carrying capacity and mechanical stability, particularly in surface-mountable designs, due to limitations in bonding layers and electrical connections.

Innovation Solution

The optoelectronic component features a semiconductor chip with multiple vias connecting electrical back contacts to the carrier, using a bonding layer and vias formed from the same metal alloy, with strategically varying widths to enhance current flow and mechanical stability, and an insulation layer to prevent short circuits, while the production method involves a single step for forming the bonding layer and vias without shrinkage holes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a bonding layer is used to connect the semiconductor chip to the carrier, then mechanical stability is improved, but current carrying capacity is limited

Engineering Contradiction:
Improvemechanical stabilityVSAvoidcurrent carrying capacity
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The bonding layer and electrical connection are merged into a single component. The bonding layer is made conductive by incorporating metal particles or using a metal alloy, allowing it to simultaneously provide mechanical bonding and electrical current flow between the semiconductor chip and carrier, eliminating the need for separate bonding and connection structures

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bonding layer performs multiple functions: mechanical adhesion, electrical conduction, and thermal management. By using a conductive bonding material, the same layer that provides mechanical stability also serves as the current path, improving both mechanical stability and current carrying capacity without adding separate components

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple vias are used to connect back contacts to electrical connection regions, then current carrying capacity is improved, but device complexity increases

Engineering Contradiction:
Improvecurrent carrying capacityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The vias are integrated into the bonding layer formation process rather than being created as separate structures. The bonding layer material is deposited to automatically form via structures that connect through the carrier, combining the via creation and bonding operations into a single process step, thus improving current carrying capacity without proportionally increasing device complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The via structures are prepared in advance as part of the bonding layer deposition process. The bonding layer is applied in a way that pre-forms the via pathways through the carrier, so that when the bonding is complete, the conductive paths are already established, reducing the need for subsequent complex via formation steps

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If the bonding layer and vias are formed in separate steps, then manufacturing precision is improved, but productivity decreases

Engineering Contradiction:
Improvealignment precisionVSAvoidproduction efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The bonding layer formation and via formation are merged into a single deposition step. The bonding material is applied in a pattern that simultaneously creates both the bonding regions and the via structures, eliminating the need for separate alignment and deposition steps, thus improving productivity while maintaining precision through the self-aligned nature of the single-step process

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bonding layer deposition process serves multiple purposes: it bonds the chip to the carrier, creates via structures for electrical connection, and defines the electrical connection regions. This multi-functional approach allows a single process step to achieve what previously required multiple separate steps, improving production efficiency without sacrificing manufacturing precision

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly improves the current carrying capacity and long-term stability of the optoelectronic component by distributing current flow effectively and preventing mechanical instability, while simplifying the production process.

Implementation Method 1

The bonding layer preferably comprises a metal or a metal alloy

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

The first electrical back contact is connected electrically conductively to the first electrical connection region by at least one via extending through the carrier

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS9263655B2Optoelectronic component and method for the production thereof
Publication Date: 2016.02.16 OSRAM OLED
  • US9263655B2 patent drawing
  • US9263655B2 patent drawing
  • US9263655B2 patent drawing

AI summary

An optoelectronic component has a semiconductor chip and a carrier, which is bonded to the semiconductor chip by means of a bonding layer of a metal or a metal alloy. The semiconductor chip includes electrical connection regions facing the carrier and the carrier includes electrical back contacts on its back remote from the semiconductor chip. The back contacts are connected electrically conductively to the first electrical or second connection region respectively, in each case by at least one via extending through the carrier. The first and/or second electrical back contact is connected to the first or second electrical connection region respectively by at least one further via extending through the carrier.