Conductive Clips Replace Wirebonds in Semiconductor Packages
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Solution Overview
Problem
Conventional high power semiconductor package designs using wirebonds increase electrical resistance, reduce current carrying capacity, and increase package form factor and complexity, leading to higher manufacturing costs and reduced power density.
Innovation Solution
The use of multiple conductive clips in a high power semiconductor package provides direct and efficient electrical connections between transistors, replacing wirebonds with conductive clips that offer lower resistance and higher current carrying capacity, thereby reducing package electrical resistance, form factor, complexity, and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wirebonds are used for transistor interconnections, then electrical connections can be established, but electrical resistance increases and current carrying capacity decreases
Solution Approach 1:
The patent extracts and removes the wirebond interconnection method from the package design, replacing it with direct leadframe pad connections. This eliminates the wirebond-related resistance and inductance issues while maintaining electrical connectivity between transistors through the leadframe structure itself.
Solution Approach 2:
The leadframe pad structure serves as an intermediary element that directly connects transistor electrodes without requiring wirebonds. The leadframe pads act as both mechanical support and electrical conduction path, reducing the number of intermediate connection elements and thereby reducing overall resistance.
2Reliability
If wirebonds are used for transistor interconnections, then electrical connections can be established, but package form factor and complexity increase
Solution Approach 1:
The patent merges the functions of mechanical support and electrical connection into the leadframe pad structure. The leadframe simultaneously provides package structural integrity and serves as the interconnection medium between transistors, eliminating the need for separate wirebond interconnection systems and reducing overall package complexity.
Solution Approach 2:
The leadframe structure is designed to perform multiple functions: providing mechanical support for the package, serving as the electrical interconnection medium between transistors, and acting as the external package leads. This multi-functionality reduces the number of separate components needed and simplifies the overall package design.
3Reliability
If wirebonds are used for transistor interconnections, then electrical connections can be established, but manufacturing cost increases
Solution Approach 1:
The patent removes the wirebonding process from the manufacturing sequence, eliminating the associated material costs, equipment requirements, and process complexity. The direct leadframe pad connections are formed as part of the standard leadframe manufacturing process, significantly reducing interconnection costs.
Solution Approach 2:
The invention changes the fundamental parameter of interconnection method from wirebond-based to leadframe-pad-based connections. This parameter change transforms the manufacturing process from a multi-step assembly involving wire bonding to a simpler process that leverages the existing leadframe structure, reducing both cost and complexity.
4Reliability
If wirebonds are used for transistor interconnections, then electrical connections can be established, but current carrying capacity is reduced
Solution Approach 1:
The patent extracts and eliminates the wirebond interconnection limitation, replacing it with direct leadframe pad connections that have significantly higher current carrying capacity. The leadframe pads provide broad surface area contact and low resistance paths, enabling high-power applications without the current density constraints of wirebonds.
Data Source
AI summary
One exemplary disclosed embodiment comprises a high power semiconductor package configured as a buck converter having a control transistor and a sync transistor disposed on a common leadframe pad, a driver integrated circuit (IC) for driving the control and sync transistors, and conductive clips electrically coupling the top surfaces of the transistors to substrate pads such as leadframe pads. In this manner, the leadframe and the conductive clips provide efficient grounding or current conduction by direct mechanical connection and large surface area conduction, thereby enabling a package with significantly reduced electrical resistance, form factor, complexity, and cost when compared to conventional packaging methods using wirebonds for transistor interconnections.