Conductive Ink Logic Gate Matrix Fabrication
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Solution Overview
Problem
Existing methods for printing electronic circuitry on PCBs require cutting openings in the insulation layer, which is inefficient and dependent on specific circuit designs, limiting flexibility and complexity in circuit implementation.
Innovation Solution
A method involving the deposition of vertical and horizontal conductive lines with pads on a substrate, where isolation paths are printed first, allowing for the connection of logical gates like NOR gates without specific design dependency, using conductive ink to form connections between lines, enabling the creation of a connection matrix that can implement various digital logic circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If openings are cut in the insulation layer to connect conductive wires, then electrical connections between devices can be established, but the manufacturing process becomes complex and design-specific
Solution Approach 1:
Instead of cutting openings in the insulation layer to create connections, the patent inverts the approach by printing conductive material directly at the intersection points of horizontal and vertical conductive lines. This eliminates the need for insulation layer openings and creates a simpler, more universal fabrication process where connections are formed by additive deposition rather than subtractive cutting.
Solution Approach 2:
The patent creates a universal matrix structure with horizontal and vertical conductive lines that can implement any digital logic circuit through selective filling of intersection points. This universal grid system replaces design-specific routing with a standardized framework that can accommodate various logic functions (AND, OR, NAND, NOR, etc.) without requiring different fabrication approaches for each circuit design.
2Adaptability or versatility
If insulation layers are cut to form openings for conductive wire connections, then specific circuit designs can be implemented, but flexibility and adaptability are reduced
Solution Approach 1:
The patent inverts the conventional approach by instead of cutting openings to achieve connections, it deposits conductive material to form connections. This inversion creates a more flexible system where the same basic matrix structure can be adapted to different circuit designs by simply varying which intersection points receive conductive material, eliminating the need for design-specific opening patterns.
Solution Approach 2:
The patent segments the conductive connection process into discrete intersection points within a universal grid matrix. Each intersection point can be independently configured to either connect or remain isolated, allowing flexible circuit design through selective activation of connection points rather than requiring custom-routed traces for each design scenario.
3Manufacturing precision
If conductive wires are printed with pads and insulation bands before final connections, then circuit structure is defined, but additional fabrication steps are required
Solution Approach 1:
The patent merges multiple fabrication steps into a more integrated process. The horizontal and vertical conductive lines are printed as continuous structures across the substrate, and connection points are formed by selective deposition at intersections. This combines the functions of trace routing, pad formation, and connection creation into a unified printing process, eliminating separate steps for creating openings and making connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the flexible and efficient creation of electronic printing circuit boards using atomic building blocks like NOR gates, enabling the implementation of complex logic circuits without the need for cutting insulation layers, thus enhancing design flexibility and reducing fabrication complexity.
Implementation Method 1
deposition of conductive ink on a substrate
Data Source
AI summary
A method of making a logic gate array includes providing a substrate; forming an array of first conductive lines with plurality of first pads disposed on each of the first conductive lines on the substrate wherein the array of first conductive lines is disposed in a first direction; forming an array of isolation lines over the first conductive lines wherein the isolation lines are not disposed on the first pads; forming an array of second conductive lines with plurality of second pads disposed on each of the second conductive lines on the substrate wherein the array of second conductive lines is disposed in a second direction and wherein orientation of the second direction is different than the orientation of the first direction; and printing one or more conductive ink dots at least one intersection of the first conductive lines and the second conductive lines by connecting the corresponding first pads and corresponding second pads.