Conductive Pad and TiN Capping Structure for Defect-Reduced Alignment
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Solution Overview
Problem
As semiconductor devices scale down, achieving accurate alignment between layers becomes increasingly difficult due to high reflectivity of conductive pads, leading to device defects such as hillocks, which degrade yield and performance.
Innovation Solution
A conductive pad scheme using aluminum doped with silicon or ruthenium, combined with a titanium nitride capping layer, is employed to reduce reflectivity and prevent hillock formation, enhancing thermal stability and alignment accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional techniques are used to reduce the reflectivity of conductive pads, then alignment accuracy is improved, but device defects such as hillocks are generated
Solution Approach 1:
The patent uses a composite material structure consisting of a conductive pad layer (aluminum-based) combined with a capping layer (titanium nitride). This composite structure reduces the reflectivity of the conductive pad surface without generating hillock defects, thereby improving alignment accuracy while maintaining device reliability. The titanium nitride capping layer modifies the optical properties of the aluminum conductive pad, creating a composite material that achieves both low reflectivity and defect-free fabrication.
2Productivity
If device geometry size is reduced through scaling down, then production efficiency is improved and costs are lowered, but alignment between layers becomes harder to achieve
Solution Approach 1:
The patent changes the optical parameters of the conductive pad surface by applying a titanium nitride capping layer. This parameter change (reducing reflectivity) directly addresses the alignment difficulty caused by scaling down device geometry. The modified optical properties enable better alignment between layers even as device dimensions decrease, thus maintaining manufacturing precision while benefiting from scaling-induced productivity improvements.
3Manufacturing precision
If the reflectivity of conductive pads is reduced to ensure accurate alignment, then alignment accuracy is improved, but device yield and performance may worsen due to hillock formation
Solution Approach 1:
The titanium nitride capping layer serves as an intermediary between the aluminum conductive pad and the environment. This intermediary layer reduces the reflectivity of the conductive pad surface, enabling accurate alignment, while simultaneously preventing the formation of hillock defects that would otherwise reduce device yield. The capping layer mediates between the conflicting requirements of alignment accuracy and device yield by modifying the surface properties without compromising the underlying conductive pad structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves device yield and performance by reducing defects and enabling more precise alignment during fabrication, while maintaining thermal stability and compatibility with existing processes.
Implementation Method 1
it may be desirable to reduce a reflectivity of conductive pads of an IC device
Implementation Method 2
enhancing thermal stability and alignment accuracy
Data Source
AI summary
An interconnect structure includes at least a first interconnect element and a second interconnect element. A conductive pad layer is disposed over, and electrically coupled to, the first interconnect element. A capping layer is disposed over the conductive pad layer. The capping layer includes titanium nitride. A dielectric layer is disposed over the capping layer. A conductive contact extends vertically through at least a first portion of the dielectric layer and the capping layer. The conductive contact is coupled to the first interconnect element through the conductive pad layer. A conductive via extends vertically through at least a second portion of the dielectric layer. The conductive via is coupled to the second interconnect element.


