Conductive Plate Strained Transistor for Breakdown and On-Resistance
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Solution Overview
Problem
LDMOSFETs face challenges in achieving high breakdown voltage and low on-resistance due to increased ILD layer thickness, which reduces the RESURF electric field strength and increases power loss and fabrication complexity.
Innovation Solution
Integration of a conductive plate below the ILD layer, which generates a RESURF electric field and compressive/tensile strain/stress in the drift and channel regions, increasing carrier mobility and reducing on-resistance, while being fabricated with controlled distances to enhance breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the ILD layer thickness is increased, then the breakdown voltage is improved, but the RESURF electric field strength is reduced and on-resistance increases
Solution Approach 1:
The patent segments the electric field generation function by introducing a separate conductive plate structure below the ILD layer. This conductive plate works in conjunction with the diffusion region to generate the RESURF electric field, effectively decoupling the ILD layer thickness from the electric field strength. The segmentation allows the ILD layer to provide breakdown voltage protection while the conductive plate-diffusion region pair maintains strong electric field for low on-resistance.
Solution Approach 2:
The conductive plate acts as an intermediary element between the ILD layer and the diffusion region. It mediates the electric field generation process by working with the diffusion region to create the RESURF effect, compensating for the reduced electric field strength caused by increased ILD layer thickness. This intermediary structure enables both high breakdown voltage and low on-resistance to coexist.
2Strength
If the ILD layer thickness is increased, then the breakdown voltage is improved, but fabrication complexity increases
Solution Approach 1:
The patent merges the conductive plate formation with the existing ILD layer deposition process. The conductive plate is formed as part of the same fabrication sequence that creates the ILD layer, combining multiple functions into a unified structure. This merging approach simplifies fabrication by reducing the number of separate process steps while achieving both breakdown voltage enhancement and low on-resistance.
Solution Approach 2:
The conductive plate structure serves multiple functions simultaneously: it generates the RESURF electric field, works with the ILD layer for breakdown voltage protection, and can be integrated into existing fabrication processes. This multi-functionality reduces overall device complexity by eliminating the need for separate structures for each function.
3Loss of energy
If the conductive plate is positioned closer to the diffusion region, then the RESURF electric field strength is increased, but breakdown voltage decreases
Solution Approach 1:
The patent utilizes parameter changes in the conductive plate configuration, specifically its distance from the diffusion region and its lateral extension dimensions. By optimizing these parameters, the design achieves a balance where the conductive plate is positioned to generate sufficient RESURF electric field strength for low on-resistance while maintaining adequate breakdown voltage. The parameter optimization allows both conflicting requirements to be satisfied simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The conductive plate increases breakdown voltage and reduces on-resistance, improving power conversion efficiency and simplifying high-voltage transistor fabrication, thereby meeting higher power/voltage demands and reducing costs.
Implementation Method 1
The conductive plate can cause a RESURF electric field between the conductive plate and the diffusion region
Implementation Method 2
The conductive plate can cause between about 0.1 GPa and about 3 GPa compressive and/or tensile stress in the drift region and the channel region
Data Source
AI summary
The present disclosure describes a structure with a conductive plate and a method for forming the structure. The structure includes a gate structure disposed on a diffusion region of a substrate, a protective layer in contact with the diffusion region and covering a sidewall of the gate structure and a portion of a top surface of the gate structure, and a first insulating layer in contact with the gate structure and the protective layer. The structure further includes a conductive plate in contact with the first insulating layer, where a first portion of the conductive plate laterally extends over a horizontal portion of the protective layer, and where a second portion of the conductive plate extends over a sidewall portion of the protective layer covering the sidewall of the gate structure. The structure further includes a second insulating layer in contact with the conductive plate.