Conductive Through Via for Power Chip Heat Dissipation

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Solution Overview

Problem

Conventional power device packaging with upper and bottom electrodes requires complex fabrication processes and high-cost equipment due to high power consumption, especially in electric vehicles, where effective heat dissipation is a significant challenge.

Innovation Solution

The electronic device packaging structure includes a semiconductor device with a conductive through via structure that penetrates both surfaces of the semiconductor base, allowing for improved heat dissipation by attaching the electrode-less side of the chip to a heatsink, and can be packaged using wire-bonding or soldering, enhancing heat dissipation efficiency and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional power module packaging with upper and bottom electrodes is used, then electrical connection is achieved, but fabrication process complexity and packaging equipment cost increase

Engineering Contradiction:
Improvepackaging process simplicityVSAvoidpackaging structure complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The invention extracts the bottom electrode function by creating a through-via that penetrates the semiconductor substrate, allowing the electrode to be accessible from the front side only. This eliminates the need for separate bottom electrode packaging operations and simplifies the overall packaging structure while maintaining electrical connection functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention transitions from a planar electrode arrangement (top and bottom surfaces) to a three-dimensional through-via structure. The conductive via extends vertically through the substrate, enabling electrical connection through the thickness dimension and allowing simplified top-side packaging while maintaining both electrical and thermal pathways.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Temperature

If conventional power module packaging is used, then electrical connection is established, but heat dissipation efficiency decreases

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidpower consumption capacity
Core Design Contradiction:
TemperatureVSProductivity

Solution Approach 1:

The through-via structure serves multiple functions simultaneously: it provides electrical connection from the top electrode to the substrate, acts as a thermal conduction pathway for heat dissipation, and maintains mechanical structural integrity. This multi-functionality enables effective heat dissipation while supporting high power consumption applications.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The conductive via material acts as an intermediary that bridges both electrical and thermal pathways. By selecting materials with high electrical conductivity and high thermal conductivity, the via simultaneously facilitates current flow and heat transfer from the electrode to the substrate, resolving the heat dissipation challenge in high-power devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Temperature

If through via structure is implemented, then heat dissipation area increases, but manufacturing process complexity increases

Engineering Contradiction:
Improveheat dissipation areaVSAvoidfabrication process simplicity
Core Design Contradiction:
TemperatureVSEase of manufacture

Solution Approach 1:

The invention merges the formation of the conductive via with the existing semiconductor fabrication process steps. The via is created using standard photolithography, etching, and filling techniques that are already part of the manufacturing flow, thereby increasing heat dissipation area without proportionally increasing overall manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8536701B2Electronic device packaging structure
Publication Date: 2013.09.17 IND TECH RES INST
  • US8536701B2 patent drawing
  • US8536701B2 patent drawing
  • US8536701B2 patent drawing

AI summary

An electronic device packaging structure is provided. The semiconductor device includes a semiconductor base, an emitter, a collector, and a gate. The emitter and the gate are disposed on a first surface of the semiconductor base. The collector is disposed on a second surface of the semiconductor base. A first passivation layer is located on the first surface of the semiconductor base surrounding the gate. A first conductive pad is disposed on the first passivation layer. A second conductive pad is disposed on the collector on the second surface. At least one conductive through via structure penetrates the first passivation layer, the first and second surfaces of the semiconductor base, and the collector to electrically connect the first and second conductive pads.