Conductive Underfill Ground Plane for RF Signal Integrity

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Solution Overview

Problem

Semiconductor packages face signal degradation due to the use of dielectric underfill materials around solder joints, which are ineffective for RF applications, and edge bond materials can also cause signal degradation by contacting solder joints near the package edge.

Innovation Solution

A conductive underfill structure is implemented around external electrical connections, using a conductive polymer material with fillers, which provides mechanical stress protection and a common ground plane by electrically contacting ground pads on the package or carrier, eliminating the need for additional metal layers on the carrier.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dielectric underfill material is used around solder joints, then mechanical stress protection is improved, but RF signal quality deteriorates due to signal degradation

Engineering Contradiction:
Improvemechanical stress protectionVSAvoidsignal degradation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the electrical parameter of the underfill material from dielectric (insulating) to conductive, while maintaining its mechanical stress distribution function. This parameter change allows the underfill to serve dual purposes: mechanical protection and RF signal grounding, eliminating signal degradation caused by dielectric materials.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite materials by incorporating conductive fillers (such as metal particles or conductive polymers) into the underfill matrix, creating a material that combines mechanical support properties with electrical conductivity. This composite approach enables simultaneous mechanical stress protection and RF signal management.

Inventive Principle:
Principle #40Composite materials

2Strength

If edge bond material is used to strengthen package attachment, then mechanical robustness is improved, but signal degradation occurs due to contact with solder joints near the package edge

Engineering Contradiction:
Improvemechanical robustnessVSAvoidsignal degradation
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The conductive underfill material performs multiple functions simultaneously: it provides mechanical stress protection, acts as an electrical ground plane for RF signals, and eliminates the need for separate edge bond material. This multi-functionality resolves the contradiction by removing the harmful edge bond material while maintaining mechanical robustness through the conductive underfill's inherent properties.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functions of mechanical support and electrical grounding into a single conductive underfill structure, eliminating the need for separate edge bond material. This consolidation removes the source of signal degradation while preserving mechanical attachment strength.

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If additional metal layers are added to the carrier to provide ground plane, then RF signal quality is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
ImproveRF signal qualityVSAvoidcarrier design complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The conductive underfill material serves itself to provide the ground plane function that would otherwise require additional metal layers on the carrier. By making the underfill conductive, it autonomously performs both mechanical support and electrical grounding functions, eliminating the need for complex carrier modifications.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent extracts the ground plane function from the carrier structure and relocates it to the underfill material. This extraction simplifies the carrier design by removing the requirement for additional metal layers, while the conductive underfill assumes the grounding responsibility.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances the robustness of solder joints, reduces signal degradation, and lowers the complexity and cost of the carrier design by providing a conductive ground plane while maintaining mechanical support.

Implementation Method 1

The underfill structure is formed from a conductive material, such as a conductive polymer underfill material, which may also include conductive fillers or particles for increased electrical conductivity.

Methodology Applied
Scientific EffectConductive polymer with fillers:

Implementation Method 2

The underfill material protects the solder joints by distributing various mechanical stresses away from the solder joints, such as those arising from thermal expansion, as well as from mechanical shocks or vibration.

Methodology Applied
Scientific EffectStress distribution:

Implementation Method 3

Typically, the coefficient of thermal expansion (CTE) of a package is different than the CTE of a carrier, where this difference creates mechanical stress on the external connections that attach the package to the carrier.

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11270972B2Package with conductive underfill ground plane
Publication Date: 2022.03.08 NXP USA INC
  • US11270972B2 patent drawing
  • US11270972B2 patent drawing
  • US11270972B2 patent drawing

AI summary

Embodiments for a packaged semiconductor device and methods of making are provided herein, which includes a packaged semiconductor device including: a semiconductor die; a carrier; a plurality of electrical connections formed between the semiconductor die and the carrier; an electrical isolation layer that covers an outer surface of each of the plurality of electrical connections; and a conductive underfill structure between the semiconductor die and the carrier, and surrounding each of the plurality of electrical connections, wherein the electrical isolation layer electrically isolates each electrical connection from the conductive underfill structure.