Configuration Array Orientation Matching for Memory Yield

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Solution Overview

Problem

Existing memory array designs face challenges in reliably and cost-effectively manufacturing configuration arrays for non-volatile memory devices, as they often require different orientations and design considerations than data arrays, leading to potential manufacturing defects and reduced yield.

Innovation Solution

The use of configuration arrays with a similar orientation and layout to data arrays, including identical orientations of wordlines and bitlines, diode sensing, bitline and wordline drivers, sense amplifiers, and voltage regulators, to improve reliability and yield by ensuring consistent manufacturing adjustments affect both arrays equally.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If configuration arrays are designed with different orientations than data arrays, then configuration arrays can be optimized for their specific functions, but manufacturing defects increase and yield decreases

Engineering Contradiction:
Improvefunctional optimizationVSAvoidmanufacturing yield
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies universality by designing the configuration array with the same orientation and layout structure as the data array, making both arrays subject to identical manufacturing processes and adjustments. This universal design ensures that process optimizations benefit both arrays equally, improving manufacturing yield while maintaining functional distinctiveness through software-based configuration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If configuration arrays use different design considerations than data arrays, then configuration-specific performance can be improved, but manufacturing complexity increases

Engineering Contradiction:
Improveconfiguration performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the design methodology of configuration arrays with data arrays by using identical orientations, wordline/bitline drivers, sense amplifiers, and voltage regulator layouts. This consolidation reduces manufacturing complexity by eliminating the need for separate design and process optimization streams, while configuration performance is maintained through logical organization of configuration bits rather than physical design differences.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If configuration arrays are manufactured with separate design processes, then configuration requirements can be met, but manufacturing cost increases

Engineering Contradiction:
Improveconfiguration capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

By making the configuration array design universal with the data array design, the patent enables both arrays to be manufactured using the same processes, tools, and optimizations. This eliminates the need for separate manufacturing streams, reducing equipment utilization costs and process development expenses while maintaining full configuration capability through the standardized layout.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7697329B2Methods and apparatus for using a configuration array similar to an associated data array
Publication Date: 2010.04.13 PALISADE TECH LLP
  • US7697329B2 patent drawing
  • US7697329B2 patent drawing
  • US7697329B2 patent drawing

AI summary

Methods, apparatus, and systems in accordance with this invention include memories that include a data array and a configuration array adapted to store configuration information for configuring the data array. The data array and the configuration array include a plurality of wordlines and a plurality of bitlines. The plurality of wordlines in the data array extend in the same direction as the plurality of wordlines in the configuration array. Likewise, the plurality of bitlines in the data array extend in the same direction as the plurality of bitlines in the configuration array. The configuration array may include a wordline driver layout, a bitline driver layout, relative positions of zia contact regions, a diode sensing orientation, a sense amplifier layout, a voltage regulator layout, and a layout of conductors proximate to the array that are each substantially similar to corresponding elements of the data array. Numerous other aspects are disclosed.