Configurable Capacitor with Interconnect Structure for Low ESR

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The miniaturization of electronic circuits requires high-density, small-footprint capacitors with low Equivalent Series Resistance (ESR) and Equivalent Series Inductance (ESL) that are difficult to achieve with discrete capacitors stacked on printed circuit boards, leading to poor capacitor characteristics and wasted space.

Innovation Solution

A configurable capacitance device with a semiconductor substrate and a separate interconnect structure that allows for the electrical coupling of multiple integrally formed capacitors in parallel or series configurations, providing flexible capacitance values and reducing ESR and ESL.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple discrete capacitors are stacked on a printed circuit board, then the required capacitance value can be achieved, but the circuit footprint increases and board space is wasted

Engineering Contradiction:
Improvecapacitance valueVSAvoidcircuit footprint
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

Multiple capacitors are integrated into a single semiconductor device, combining multiple capacitor elements into one unified component that can be placed as a single footprint on the circuit board, thereby reducing the overall area occupied while maintaining the required total capacitance

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The semiconductor device provides multiple capacitor elements with different capacitance values that can be selectively activated or configured, allowing a single component to serve multiple capacitance requirements that would otherwise need separate discrete capacitors

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If multiple discrete capacitors are stacked on a printed circuit board, then the required capacitance value can be achieved, but the overall capacitor characteristics deteriorate

Engineering Contradiction:
Improvecapacitance valueVSAvoidcapacitor characteristics
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

Multiple capacitor elements are fabricated together on a single semiconductor substrate with integrated interconnections, ensuring consistent electrical characteristics and reducing parasitic effects that occur with discrete stacked capacitors, thereby improving overall capacitor performance and reliability

Inventive Principle:
Principle #5Merging (Combining)

3Quantity of substance

If multiple discrete capacitors are used, then the required capacitance value can be achieved, but manufacturing costs increase

Engineering Contradiction:
Improvecapacitance valueVSAvoidmanufacturing cost
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

Multiple capacitor elements are fabricated simultaneously on a single semiconductor substrate using standard semiconductor manufacturing processes, allowing batch production that reduces per-unit costs compared to assembling multiple discrete capacitors, thereby lowering manufacturing costs while achieving the required total capacitance

Inventive Principle:
Principle #5Merging (Combining)

4Ease of manufacture

If discrete capacitors are used with finite spacing, then manufacturing is simplified, but board space efficiency decreases

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidboard space
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

Multiple capacitor elements are integrated into a single semiconductor package with internal interconnections, eliminating the need for finite spacing between discrete capacitors on the board, thereby maximizing board space efficiency while maintaining manufacturing simplicity through standard integration processes

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20230215821A1Configurable capacitor
Publication Date: 2023.07.06 EMPOWER SEMICONDUCTOR INC
  • US20230215821A1 patent drawing
  • US20230215821A1 patent drawing
  • US20230215821A1 patent drawing

AI summary

A configurable capacitance device includes a semiconductor substrate including a plurality of integrally formed capacitors; and a separate interconnect structure coupled to the semiconductor substrate, wherein the separate interconnect structure is configurable to electrically couple two or more of the plurality of integrally formed capacitors together in a parallel configuration.