Configurable Memory Banks for Flexible Data Access Granularity
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Solution Overview
Problem
The internal column and data path structure of dynamic random access memory (DRAM) components restricts the granularity of data access, making it difficult to design flexible memory systems.
Innovation Solution
A memory device with a storage array having multiple accessible memory banks and configurable memory segments, allowing for two modes of operation: in one mode, memory segments are used as additional banks, and in another, they are accessed in parallel with existing banks, with distinct control signals generated for each mode, enabling flexible data access configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional DRAM internal column and data path structure is used, then storage density and cost-effectiveness are improved, but data access granularity is restricted and flexibility is reduced
Solution Approach 1:
The memory device is divided into multiple independently controllable memory banks (first bank, second bank, third bank, fourth bank), each capable of being accessed separately. This segmentation allows the system to achieve fine-grained data access by selecting specific banks, thereby resolving the contradiction between maintaining high storage density and achieving flexible data access granularity.
Solution Approach 2:
The memory system implements dynamic configurability through control logic that can selectively enable or disable specific memory banks based on operational requirements. The ability to dynamically configure which banks are active allows the system to adapt data access granularity to different application needs while maintaining the underlying high-density DRAM structure.
2Adaptability or versatility
If multiple memory banks are implemented for flexible data access, then data access granularity is improved, but device complexity increases
Solution Approach 1:
Multiple memory banks share common control logic and control signal lines. The control logic unit generates control signals that are distributed to all memory banks, allowing coordinated operation without requiring separate control circuits for each bank. This merging of control resources reduces overall device complexity while maintaining the flexibility of multiple independently accessible banks.
Solution Approach 2:
The control logic is designed to universally manage all memory banks using the same control signal mechanisms. A single control logic unit can configure any combination of memory banks for access, making the control system multi-functional rather than requiring dedicated control paths for each bank configuration scenario.
Data Source
AI summary
A memory device has a storage array having a plurality of accessible memory banks and a configurable first set of memory segments. The plurality of accessible memory banks include a second set of memory segments. During a first mode of operation, the first set of memory segments is configured to be an additional accessible memory bank. During a second mode of operation, a pair of memory segments in the first set of memory segments are configured to be an additional set of memory segments in each of the plurality of accessible memory banks.


