3D Configurable Processor with In-Package LUT for Complex Functions

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Solution Overview

Problem

Conventional processors face challenges in implementing non-arithmetic functions due to limitations in hardware implementation, particularly in computational density and complexity, as they rely on logic-based computation and look-up tables, which are not suitable for transcendental and complex functions, and are inflexible in supporting different mathematical functions.

Innovation Solution

A configurable processor with an in-package look-up table (IP-LUT) that uses memory-based computation, allowing for field-configurable and re-configurable computation by storing mathematical function data in programmable memory arrays and performing arithmetic operations, enabling a much larger LUT capacity and supporting a vast array of built-in functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional processors use logic-based computation with look-up tables for non-arithmetic functions, then basic transcendental functions can be implemented, but computational density and complexity are limited

Engineering Contradiction:
Improvecomputational complexityVSAvoiddie area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent transitions from 2-D integration (logic circuit and LUT on the same substrate) to 3-D integration by placing the LUT on a separate substrate and stacking it vertically with the logic circuit. This vertical integration enables significantly larger LUT capacity without increasing the horizontal die area, thereby resolving the contradiction between computational complexity and die area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If look-up tables are formed side-by-side with logic circuits on the same substrate, then built-in functions can be implemented, but the processor footprint increases and computational density decreases

Engineering Contradiction:
Improvecomputational densityVSAvoidprocessor footprint
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

By moving the LUT to a separate substrate and integrating it vertically with the logic circuit through stacking, the patent eliminates the horizontal space requirement for the LUT. This reduces the processor footprint while maintaining or enhancing computational density, as the vertical stack occupies less horizontal area than side-by-side placement.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If conventional processors use fixed logic circuits for built-in functions, then arithmetic operations are efficient, but the processor is inflexible and fully customized for specific functions

Engineering Contradiction:
ImproveconfigurabilityVSAvoidhardware implementation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces reconfigurability by allowing the LUT to be programmed with different function data after manufacturing. This dynamic capability enables the processor to adapt to different computational requirements by loading appropriate look-up table data, transforming a static logic circuit into a dynamically configurable system without requiring complex custom hardware for each function.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10445067B2Configurable processor with in-package look-up table
Publication Date: 2019.10.15 SHENZHEN CUNYANG TECHNOLOGY CO LTD
  • US10445067B2 patent drawing
  • US10445067B2 patent drawing
  • US10445067B2 patent drawing

AI summary

A configurable processor comprises a memory die and a logic die. The memory die comprises a programmable memory array for storing a look-up table (LUT) for a mathematical function, while the logic die comprises an arithmetic logic circuit (ALC) for performing at least an arithmetic operation on selected data from the LUT, wherein said mathematical function includes more operation than the arithmetic operations performable by the ALC. Complex mathematical functions can be implemented and configured.