Constant-Current Transistor Structure for Simplified Ternary Inverters
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Solution Overview
Problem
Existing binary logic-based digital systems face limitations in bit density due to increased leakage currents and power consumption in CMOS devices below 30 nm, and standard ternary inverters require multiple voltage sources or complex circuit structures.
Innovation Solution
A transistor design featuring a constant current formation layer, source/drain patterns, a gate electrode, and a gate insulating layer that generates a constant current independent of gate voltage, implemented in a ternary inverter with NMOS and PMOS transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If CMOS device size is reduced to increase bit density, then bit density is improved, but leakage current and power consumption increase
Solution Approach 1:
The patent changes the fundamental operating parameter from binary logic (0/1) to ternary logic (0/1/2), enabling three distinct current levels. This parameter change allows the system to achieve higher information density per device while maintaining lower power consumption through more efficient voltage utilization and reduced switching frequency requirements.
Solution Approach 2:
The patent segments the current flow into three distinct levels (first current level, second current level, third current level) corresponding to logic states 0, 1, and 2. This segmentation is achieved through the dual-gate transistor structure where the first gate controls source-drain current and the second gate controls channel current, creating discrete current states that reduce leakage.
2Adaptability or versatility
If standard ternary inverter structure is used, then ternary logic functionality is achieved, but circuit structure becomes complex and requires multiple voltage sources
Solution Approach 1:
The dual-gate transistor serves multiple functions simultaneously: it acts as the switching element, the current control element, and the logic state generator. The first gate handles source-drain current control while the second gate handles channel current control, enabling the single device to perform what would traditionally require multiple separate components and voltage sources.
Solution Approach 2:
The patent merges the control functions of multiple gates into a single dual-gate transistor structure. Instead of using separate transistors for different voltage control functions, both the first gate (controlling source-drain current) and second gate (controlling channel current) are integrated into one device, simplifying the overall circuit architecture while maintaining ternary logic capability.
Data Source
AI summary
A transistor includes: a substrate; a constant current formation layer provided on the substrate; a pair of source/drain patterns provided on the constant current formation layer; a gate electrode provided between the pair of source/drain patterns; a channel pattern extending in a direction between the pair of source/drain patterns; and a gate insulating layer surrounding the channel pattern, wherein the channel pattern penetrates the gate insulating layer and the gate electrode and is electrically connected to the source pattern and the drain pattern, the gate insulating layer separates the channel pattern and the gate electrode from each other, the constant current formation layer generates a constant current between the drain pattern and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.