Continuous Spacers for FinFET Electrical Isolation and Alignment

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Solution Overview

Problem

Conventional semiconductor arrangements face issues with electrical shorts and reduced integration density due to misalignment between fin ends and gate edges in FinFET structures, particularly when using self-aligned contact technology.

Innovation Solution

The semiconductor arrangement features continuously extending spacers that align with both gate stacks and dummy gates, ensuring electrical isolation and self-alignment of fin ends with spacer inner walls, thereby preventing shorts and enhancing integration density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If self-aligned contact technology is adopted with conventional discrete spacers, then contact alignment is simplified, but electrical shorts occur between contacts on opposite sides of dummy gates

Engineering Contradiction:

Improvecontact alignmentVSAvoidelectrical isolation

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent merges discrete spacers into continuous spacers that extend across multiple gate stacks and dummy gates. This combining of previously separate spacer structures creates an uninterrupted dielectric barrier that prevents electrical shorts between contacts on opposite sides of dummy gates, while maintaining the self-aligned contact fabrication advantage.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The continuous spacers are formed to extend beyond the gate stacks into the regions where dummy gates are located, before the dummy gates are formed. This preliminary extension of spacers ensures that when dummy gates are subsequently created, the spacers are already in place to provide electrical isolation, preventing shorts before they can occur.

Inventive Principle:

Principle #10Preliminary action

2Ease of manufacture

If dummy gates are used for patterning convenience, then gate formation is simplified, but misalignment between fin ends and gate edges reduces integration density

Engineering Contradiction:

Improvepatterning convenienceVSAvoidalignment precision

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The continuous spacers serve as an intermediary reference structure that mediates between the dummy gates and the fin ends. The spacers extend continuously across both gate stacks and dummy gates, providing a unified alignment reference that ensures fin ends are properly positioned relative to both real and dummy gates, thereby maintaining integration density despite the presence of dummy gates.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10832972B2Semiconductor arrangement having continuous spacers and method of manufacturing the same

Publication Date: 2020.11.10 INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD

AI summary

A semiconductor arrangement includes: a substrate; a plurality of fins formed on the substrate and extending in a first direction; a plurality of gate stacks formed on the substrate and extending in a second direction crossing the first direction and dummy gates composed of dielectric and extending in the second direction, wherein each of the gate stacks intersects at least one of the fins; and spacers formed on sidewalls of the gate stacks and sidewalls of the dummy gates, wherein spacers of at least a first one and a second one among the gate stacks and the dummy gates which are aligned in the second direction extend integrally, and at least some of the fins have ends abutting the dummy gates and substantially aligned with inner walls of corresponding ones of the spacers.