Control Voltage Generating Circuit for Accurate Delay Compensation
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Solution Overview
Problem
Existing delay circuits in LSIs face challenges in adding delay to external input signals with high accuracy while minimizing circuit size and power consumption, as they are prone to increased delay variations due to process variations and require large numbers of components, leading to increased size and power consumption.
Innovation Solution
A control voltage generating circuit using a reference voltage unit and voltage conversion unit with MOS transistors of the same conductivity type, which generates a control voltage based on transistor threshold voltages, allowing for accurate delay addition without increasing circuit size, and a constant current source circuit that stabilizes current supply by using this control voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a number of delay circuits are provided corresponding to the required delay amount, then the delay compensation is improved, but the circuit size and power consumption increase
Solution Approach 1:
The patent changes the parameter of delay control from discrete circuit stacking to continuous delay time control via current adjustment. By controlling the drive current of a single delay circuit, the delay amount can be precisely adjusted without increasing circuit size, resolving the contradiction between delay accuracy and circuit area.
Solution Approach 2:
The patent segments the delay function into a controllable drive current parameter rather than requiring multiple complete delay circuit units. This allows the same delay functionality to be achieved with a single circuit whose delay characteristic is modulated by current control, reducing the overall circuit area while maintaining delay precision.
2Manufacturing precision
If a number of delay circuits are provided corresponding to the required delay amount, then the delay compensation is improved, but the power consumption increases
Solution Approach 1:
The patent changes the operating parameter of the delay circuit from fixed delay to variable delay controlled by current. A single delay circuit with adjustable current consumes less power than multiple fixed delay circuits stacked to achieve the same total delay, as power consumption is reduced by eliminating redundant circuit units.
3Manufacturing precision
If the delay amount is increased by adding more delay circuits, then the hold time compensation is improved, but the delay variation due to process variations increases
Solution Approach 1:
The patent introduces feedback mechanisms including temperature detection circuits and delay variation detection circuits that monitor operating conditions and adjust the drive current accordingly. This feedback control compensates for process variations and environmental effects, maintaining consistent delay characteristics even when the delay amount is increased, thus improving reliability while maintaining hold time compensation capability.
Solution Approach 2:
The patent makes the delay circuit dynamic by enabling continuous adjustment of the drive current based on detected conditions. This dynamic adaptation allows the circuit to compensate for process variations in real-time, reducing delay variation compared to static multi-circuit approaches where each circuit is subject to independent variations.
4Ease of operation
If a constant current source is used to control the drive current, then the delay control is improved, but the circuit becomes susceptible to process variations
Solution Approach 1:
The patent enhances the constant current source with feedback from temperature detection and delay variation detection circuits. This feedback allows the current source to adjust its output to compensate for process variations, maintaining both ease of delay control and reliability by reducing susceptibility to manufacturing variations through active compensation.
5Manufacturing precision
If a correction circuit is added to suppress delay variations, then the delay accuracy is improved, but the circuit size increases
Solution Approach 1:
The patent merges the correction functionality into the existing delay circuit structure by integrating temperature detection and delay variation detection circuits that work together with the constant current source. This unified approach achieves delay accuracy improvement without adding separate correction circuits, thereby minimizing the increase in circuit size while maintaining high delay precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high-accuracy delay addition to external input signals while maintaining a compact circuit size and reducing power consumption, as it compensates for process variations and eliminates the need for large resistors or diodes, thereby improving delay accuracy and reducing circuit area.
Implementation Method 1
A control voltage generating circuit using a reference voltage unit and voltage conversion unit with MOS transistors of the same conductivity type, which generates a control voltage based on transistor threshold voltages
Implementation Method 2
a constant current source circuit that stabilizes current supply by using this control voltage
Data Source
AI summary
A control voltage generating circuit according to an aspect of the present invention includes: a reference voltage unit that includes a plurality of first transistors of the same conductivity type connected in series between a first power supply and a second power supply, and generates a drain voltage of one of the plurality of first transistor as a reference voltage; and a voltage conversion unit that includes a plurality of second transistors connected in series between the first power supply and the second power supply and having the same conductivity type as that of the reference voltage, supplies the reference voltage to a gate of one of the plurality of second transistors, and outputs a drain voltage of one of the plurality of second transistors as a control voltage.