Converter Chain Synchronization Using Learned Latency Offsets
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Solution Overview
Problem
Existing methods for synchronizing multiple analogue-digital or digital-analogue converters are either difficult to implement, energy-intensive, or require manual adjustment, which can be time-consuming and prone to errors.
Innovation Solution
A method involving a chain of converters connected to a control unit and a clock with a predefined period, where each converter generates an internal synchronization signal and computes an internal offset based on latency measurements to align data transmission effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the length of electrical paths is adjusted to synchronize converters, then synchronization precision is improved, but device complexity and implementation difficulty increase
Solution Approach 1:
The patent replaces the mechanical approach of physically adjusting electrical path lengths with a digital/software-based solution. A synchronization controller measures actual propagation delays and computes compensation values that are applied digitally to align data streams, eliminating the need for physical path length adjustments and their associated complexity
Solution Approach 2:
The patent changes the approach from modifying physical parameters (path lengths) to adjusting temporal parameters (delay compensation values). By measuring actual propagation delays and applying computational corrections, the system achieves synchronization through parameter optimization rather than physical restructuring
2Measurement precision
If analogue delay components are used to realign signals, then synchronization is achieved, but energy consumption increases and adjustability decreases
Solution Approach 1:
The patent substitutes physical analogue delay components with digital delay implementation. Instead of using energy-intensive analogue circuits to hold signals, the system uses digital buffering and timing control in the synchronization controller, dramatically reducing energy consumption while maintaining precision
Solution Approach 2:
The system implements self-adjusting synchronization where the controller automatically measures propagation delays and computes compensation values without manual intervention. This eliminates the need for difficult manual adjustment of analogue components while achieving precise alignment
3Device complexity
If manual adjustment is used for synchronization, then implementation complexity is reduced, but time consumption and error probability increase
Solution Approach 1:
The patent implements an automatic synchronization system where the controller autonomously measures propagation delays, computes compensation values, and applies corrections without user intervention. This eliminates time-consuming manual adjustment while keeping the system relatively simple through automated algorithms
4Measurement precision
If active components are added to the clock signal path for synchronization, then synchronization capability is improved, but temperature stability and system adjustability deteriorate
Solution Approach 1:
The patent extracts the active components from the clock signal path and relocates synchronization functionality to a separate controller that receives data from converters. This removes temperature-sensitive active components from the critical clock path, improving temperature stability while maintaining synchronization capability through separate measurement and control
Data Source
AI summary
The invention relates to a method for synchronizing a plurality of analogue-digital or digital-analogue converters (CONV_k), the converters (CONV_k) all being connected to a control unit (UC), and to a clock (CLK) that has a predefined clock period (Tclk), the converters being also chained step-by-step so as to form a chain of converters, each converter (CONV_k) generating an internal synchronization signal (internal_sync_k) configured to supply a time reference on the transmission of data by the converter (CONV_k).The method allows the synchronization of the converters to be guaranteed using a process of learning and of configuration of the converters. The method allows any line distance constraint on the synchronization signal to be overcome.