Electrical Converter with Third Intermediate Node for ZVS
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Solution Overview
Problem
Existing single-stage buck-type PFC converters based on the 3rd harmonic active filter principle face challenges in achieving zero-voltage-switching (ZVS) without increasing the cost, size, and complexity of inductors, especially when common-mode (L-C) output filters are used or interleaving of parallel output stages is employed.
Innovation Solution
The electrical converter incorporates a phase selector and two buck circuits connected in series, with actively switchable devices between the common node and the third intermediate node, allowing for zero-voltage-switching (ZVS) operations across the whole operating range without the need for magnetic coupling of inductors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a common-mode (L-C) output filter is used to reduce leakage currents, then leakage current reduction is improved, but zero-voltage-switching (ZVS) cannot be achieved without increasing the cost, size, and complexity of inductors
Solution Approach 1:
The patent introduces a third intermediate node as an intermediary element between the traditional two-node buck converter structure. This additional node serves as a mediator that enables independent control of switching devices, allowing ZVS to be achieved while maintaining simple, uncoupled inductors in the common-mode output filter configuration.
2Loss of energy
If magnetic coupling of inductors is implemented to achieve ZVS, then switching losses are reduced, but the cost, size, and complexity of inductors increase
Solution Approach 1:
The patent segments the power conversion function into two independent buck circuits operating in parallel, each with its own uncoupled inductor. The third intermediate node enables coordinated control of these segmented circuits to achieve overall ZVS without requiring magnetic coupling between inductors, thus reducing energy losses while maintaining structural simplicity.
3Power
If interleaving of parallel output stages is used to increase power rating, then power density is improved, but the size of in- and output filters must be decreased which complicates the design
Solution Approach 1:
The patent merges multiple parallel buck circuit stages into a unified configuration controlled by the third intermediate node. This merging approach enables interleaved operation of parallel output stages to increase power rating while the common control structure simplifies filter design, avoiding the complexity that would otherwise result from coordinating multiple independent stages.
4Productivity
If higher switching frequencies are used to increase power density, then conversion efficiency is improved, but achieving ZVS becomes more difficult without complex inductor configurations
Solution Approach 1:
The patent introduces dynamic control capability through the third intermediate node, which enables real-time adjustment of switching device operation. This dynamic control mechanism facilitates achievement of ZVS across varying operating conditions and frequencies, allowing higher switching frequencies to be used for increased power density without requiring complex fixed inductor configurations.
Data Source
Figure 1
Figure 2A~2B
Figure 2C~2D
AI summary
Electrical converter (10) for conversion between a three-phase AC signal and a DC signal, comprising three phase terminals (A, B, C), a first and second DC terminal (P, N), a phase selector (11) for connecting the three phase terminals to a first, a second and a third intermediate node (x, y, z), a first buck circuit comprising a first switch-node terminal (p) connected to the first DC terminal and a second buck circuit comprising a second switch-node terminal (n) connected to the second DC terminal, said first and second buck circuits converting a voltage at the first, second and third intermediate node to a voltage between the first and second DC terminal, said first and second buck circuits being connected in series between the first and second intermediate node and comprising at least one actively switchable device connected between the common node (m) and the third intermediate node. The first buck circuit allows for connecting the first switch-node terminal (p) to any one of the first intermediate node (x), the third intermediate node (z), and the common node (m). The second buck circuit allows for connecting the second switch-node terminal (n) to any one of the second intermediate node (y), the third intermediate node (z), and the common node (m).