Convex LDMOS Transistor Breakdown Voltage Miniaturization
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Solution Overview
Problem
Conventional planar LDMOS transistors face challenges in achieving miniaturization while maintaining high breakdown voltage, and vice versa.
Innovation Solution
The semiconductor device features a semiconductor substrate with convex portions and a drain region of higher impurity concentration, arranged such that the drain region and gate electrode sandwich a first region, allowing for improved breakdown voltage and miniaturization through the use of STI structures and specific impurity concentrations and crystal plane orientations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional planar LDMOS transistor configuration is used, then the device structure is simple, but the breakdown voltage cannot be improved while achieving miniaturization
Solution Approach 1:
The patent introduces a convex portion that protrudes from the semiconductor substrate surface, creating a three-dimensional structure. The drain region is positioned within this convex portion, extending the current path in the vertical dimension while maintaining a compact planar footprint. This dimensional transition enables increased breakdown voltage without proportionally increasing device area, resolving the contradiction between device simplicity and breakdown voltage performance.
2Area of moving object
If the device size is reduced for miniaturization, then the cell size decreases, but the breakdown voltage deteriorates
Solution Approach 1:
By forming a convex portion that extends upward from the substrate, the patent creates additional vertical space for the drain region. This allows the current path to extend in the vertical direction rather than requiring larger horizontal dimensions, enabling miniaturization while maintaining breakdown voltage through the RESURF effect and extended current path length.
Solution Approach 2:
The patent optimizes the impurity concentration distribution, with the drain region having higher impurity concentration than the first region. This parameter optimization, combined with the convex portion geometry, enhances the RESURF effect and allows achievement of high breakdown voltage in a miniaturized cell structure.
3Reliability
If the breakdown voltage is increased, then the reliability improves, but the device size increases
Solution Approach 1:
The convex portion structure utilizes the vertical dimension to extend the current path length between source and drain. This enables increased breakdown voltage through the extended current path and RESURF effect without requiring proportional increases in lateral device dimensions, thus improving reliability without significantly increasing device footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances breakdown voltage and enables miniaturization of the LDMOS transistor by increasing the current path length and utilizing the RESURF effect, while maintaining the same size or reducing cell size.
Implementation Method 1
utilizing the RESURF effect
Data Source
AI summary
A semiconductor substrate has a surface and a convex portion projecting upward from the surface. An n-type drift region has a portion located in the convex portion. The n−-type drain region has a higher n-type impurity concentration than the n-type drift region, and is arranged in the convex portion and on the n-type drift region such that the n−-type drain region and a gate electrode sandwich the n-type drift region in plan view.