Convolution Hardware for Discrete Fourier Transforms

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Solution Overview

Problem

Existing neural network accelerators require external general-purpose hardware for discrete Fourier-related transforms, leading to inefficiencies in execution time, power consumption, and increased bandwidth usage due to the need for data transfer, and lack dedicated hardware for these operations, resulting in underutilization of resources.

Innovation Solution

Implementing discrete Fourier-related transforms using the existing convolution hardware in neural network accelerators by reshaping weight matrices into convolution kernels, allowing matrix multiplication operations to be performed as convolution operations, thereby leveraging the hardware's computational resources without external processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external general-purpose hardware is used for discrete Fourier-related transforms, then the transforms can be performed, but execution time increases and power consumption increases

Engineering Contradiction:

Improvetransform execution capabilityVSAvoidexecution time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the discrete Fourier-related transform functionality with the existing convolution hardware by deriving convolution kernels from weight matrices. This integration eliminates the need for separate external processing hardware, allowing transforms to be executed within the neural network accelerator itself, thereby reducing execution time and improving efficiency.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The convolution hardware is made universal by enabling it to perform both convolution operations and discrete Fourier-related transforms. By deriving convolution kernels from weight matrices representing multiplicands or multipliers, the same hardware resources can handle multiple types of operations, reducing the need for dedicated external hardware and decreasing execution time.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If external general-purpose hardware is used for discrete Fourier-related transforms, then the transforms can be performed, but power consumption increases

Engineering Contradiction:

Improvetransform execution capabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines transform execution with existing convolution hardware operations, eliminating the need to activate separate external processing units. By performing transforms within the neural network accelerator using derived convolution kernels, power consumption is reduced as fewer hardware components need to be activated and data transfer between components is minimized.

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If external general-purpose hardware is used for discrete Fourier-related transforms, then the transforms can be performed, but bandwidth usage increases due to data transfer

Engineering Contradiction:

Improvetransform execution capabilityVSAvoiddata transfer bandwidth

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges transform operations with convolution hardware, allowing data to remain within the neural network accelerator throughout the transformation process. This eliminates the need for data to be transferred to and from external general-purpose hardware, significantly reducing bandwidth usage and improving overall system efficiency.

Inventive Principle:

Principle #5Merging (Combining)

4Device complexity

If dedicated hardware for discrete Fourier-related transforms is not included, then device complexity is reduced, but resource utilization decreases

Engineering Contradiction:

Improvehardware architecture simplicityVSAvoidresource utilization

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The patent makes the convolution hardware universal by enabling it to perform both convolution operations and discrete Fourier-related transforms through kernel derivation from weight matrices. This approach maintains device complexity at acceptable levels while significantly improving resource utilization, as the same hardware resources can now handle multiple operation types without requiring dedicated transform hardware.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The neural network accelerator serves itself by performing discrete Fourier-related transforms using its own convolution hardware resources. By deriving convolution kernels from weight matrices and executing transforms internally, the system eliminates the need for external processing, thereby improving resource utilization without adding device complexity.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS20230117042A1Implementation of discrete fourier-related transforms in hardware

Publication Date: 2023.04.20 IMAGINATION TECH LTD

AI summary

A mechanism for performing a discrete Fourier-related transform using a hardware accelerator that comprises fixed-function circuitry including convolution hardware configured to perform one or more convolution operations. A matrix multiplication operation used in the discrete Fourier-related transform is performed by the convolution hardware using a convolution operation. A convolution kernel for the convolution operation is derived from a weight matrix representing a multiplicand or multiplier of the matrix multiplication operation.