Coplanar Metallic Bonding Layers for IC Packages
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Solution Overview
Problem
Current leadframe base packages with copper traces face challenges due to etch resolution limitations, leading to increased package size and electrical parasitic effects, as well as high manufacturing costs from multiple masking and plating steps.
Innovation Solution
A method involving two-sided patterning of insulating layers to create separated coplanar metallic bonding layers, eliminating the need for etch-resistant metals and reducing manufacturing complexity and costs, while providing structural stability and minimizing electrical parasitic effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper traces are etched in copper foil to provide electrical connection, then electrical connection between IC and package peripheral leads is achieved, but package size increases in lateral dimensions due to etch resolution limitations
Solution Approach 1:
The patent transitions from planar copper traces to three-dimensional wire bonds that connect IC pads directly to package leads through vertical routing. This dimensional change eliminates the need for lateral trace routing, reducing package footprint while maintaining electrical connectivity.
Solution Approach 2:
The invention extracts and removes the copper trace layer entirely, replacing it with wire bonds that attach directly to IC pads. This eliminates the etching process and associated resolution limitations, allowing smaller package dimensions without compromising electrical connection reliability.
2Reliability
If copper foil is plated with etch-resistant metal to pattern traces, then electrical connection is achieved, but manufacturing complexity and costs increase due to multiple masking and plating steps
Solution Approach 1:
The patent removes the copper foil substrate and etch-resistant metal plating layers entirely, replacing them with direct wire bonding to IC pads. This extraction eliminates multiple masking and plating steps, significantly simplifying the manufacturing process while maintaining reliable electrical connections.
Solution Approach 2:
The invention replaces the chemical etching and electroplating processes with mechanical wire bonding. This substitution eliminates the need for complex chemical processing, masking, and plating steps, reducing manufacturing complexity and enabling more precise control over connection geometry.
Data Source
AI summary
A method of manufacturing an electronic device package. Coating a first side of a metallic layer with a first insulating layer and coating a second opposite side of the metallic layer with a second insulating layer. Patterning the first insulating layer to expose bonding locations on the first side of the metallic layer, and patterning the second insulating layer such that remaining portions of the second insulating layer on the second opposite side are located directly opposite to the bonding locations on the first side. Selectively removing portions of the metallic layer that are not covered by the remaining portions of the second insulating layer on the second opposite side to form separated coplanar metallic layers. The separated coplanar metallic layers include the bonding locations. Selectively removing remaining portions of the second insulating layer thereby exposing second bonding locations on the second opposite sides of the separated coplanar metallic layers.