Coplanar MIM Capacitor Fabrication via Planar Electrodes
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Solution Overview
Problem
The formation of vias to connect electrodes in conventional metal-insulator-metal (MIM) capacitors can cause damage, leading to performance issues such as leakage current and undesirable frequency performance.
Innovation Solution
A method of fabricating a substantially coplanar MIM capacitor, where the electrodes are formed with a shared substantially coplanar surface to avoid damage during the etching process, involving steps like forming a patterned metal layer, an insulator layer, and a second metal layer, followed by chemical-mechanical polishing and etching to create trenches for vias that are equally sized, ensuring equal exposure and minimizing damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a via is used to bridge an electrode of a conventional MIM capacitor to an interconnect line, then the capacitor can be coupled to the interconnect line, but the via formation process causes damage to the electrode and degrades capacitor performance
Solution Approach 1:
The patent transitions from a vertical via-based connection approach to a planar coplanar electrode configuration. By making both electrodes lie in substantially the same plane, the connection method shifts to lateral routing within the interconnect layer rather than vertical penetration, eliminating the damaging via formation step while maintaining coupling capability
Solution Approach 2:
The electrodes are formed with a coplanar configuration before the interconnect layer is deposited. This preliminary structuring allows subsequent planar connections to be made without requiring damaging via formation through the electrode, preventing performance degradation before it occurs
2Quantity of substance
If conventional MIM capacitor electrodes are connected using vias, then electrical connection is achieved, but leakage current increases and frequency performance deteriorates
Solution Approach 1:
The patent extracts and eliminates the via structure from the capacitor connection architecture. By removing the via formation step entirely and replacing it with coplanar electrode configuration and planar interconnect routing, the source of electrode damage and associated harmful effects (leakage current, frequency degradation) is completely removed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents damage to the electrodes during the etching process, maintaining the integrity and performance of the MIM capacitors by ensuring equal exposure to plasma energy, thus avoiding performance degradation.
Implementation Method 1
chemical-mechanical polishing and etching to create trenches for vias that are equally sized
Implementation Method 2
etching to create trenches for vias that are equally sized, ensuring equal exposure and minimizing damage
Data Source
AI summary
A method of fabricating a metal-insulator-metal (MIM) capacitor structure on a substrate includes forming a patterned metal layer over the substrate; forming an insulator layer over the patterned metal layer; forming a second metal layer over the insulator layer; removing part of the insulating layer and part of the second metal layer thereby forming a substantially coplanar surface that is formed by the patterned metal layer, the insulator layer, and the second metal layer; removing a portion of the second metal layer and a portion of the patterned metal layer to form a fin from the insulator layer that protrudes beyond the first metal layer and the second metal layer; and forming an inter-metal dielectric layer over the fin.