Copper Bump Structure for Semiconductor Reliability

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Solution Overview

Problem

Existing semiconductor devices face challenges in forming reliable electric connection structures, particularly due to under-cut regions formed during the wet etching process, which can lead to failures and require reducing the size of these regions to enhance device reliability.

Innovation Solution

A semiconductor device is fabricated using a bump structure with a first copper layer formed via pulsed-plating and a second copper layer formed via DC plating, where the first copper layer has a higher XRD peak intensity ratio and twin boundary density, resulting in a lower etch rate and reduced under-cut regions, while the second copper layer has a higher growth rate and etch rate, allowing for controlled etching and improved corrosion resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single copper layer is formed using conventional DC plating, then the formation process is simple, but under-cut regions are formed during wet etching which reduce device reliability

Engineering Contradiction:

Improvedevice reliabilityVSAvoidcopper layer structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The copper layer is divided into two distinct layers: a first copper layer formed by pulsed plating with high (111) plane orientation and low etch rate, and a second copper layer formed by DC plating with higher etch rate. This segmentation allows each layer to perform its specific function - the first layer provides corrosion resistance and minimal under-cut, while the second layer enables controlled etching patterns

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the copper structure are given different properties through the two-layer design. The first copper layer has high (111) plane orientation and low etch rate for corrosion resistance, while the second copper layer has higher etch rate for pattern formation. This local differentiation of properties solves the contradiction between reliability and etchability

Inventive Principle:

Principle #3Local quality

2Reliability

If the copper layer has high corrosion resistance through high (111) plane orientation, then the etch rate decreases, but this makes controlled etching difficult

Engineering Contradiction:

Improvecorrosion resistanceVSAvoidetching control

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The copper structure is segmented into two layers with different crystallographic orientations and etch rates. The first layer provides corrosion resistance with low etch rate, while the second layer provides etchability with higher etch rate, solving the contradiction between these two requirements

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The etch rate parameter is differentiated between the two copper layers through controlled deposition parameters. The first layer is formed with high (111) plane orientation for low etch rate, while the second layer is formed with different parameters to achieve higher etch rate, enabling both corrosion resistance and etching control

Inventive Principle:

Principle #35Parameter changes

3Manufacturing precision

If pulsed-plating is used to form the first copper layer with high (111) plane orientation, then etch rate is reduced and under-cut regions are minimized, but the process complexity increases

Engineering Contradiction:

Improveunder-cut region controlVSAvoidplating process

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The plating process is segmented into two stages: pulsed plating for the first copper layer to achieve high (111) plane orientation and minimal under-cut, followed by DC plating for the second copper layer. This segmentation of the manufacturing process achieves high precision in under-cut control while managing overall process complexity through clear division of functions

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach reduces the size of under-cut regions, enhances corrosion resistance, and increases the reliability of semiconductor devices by controlling the etching process and growth rates of copper layers, thereby improving the overall performance and reliability of the semiconductor device.

Implementation Method 1

The first copper layer is formed using a pulsed-plating process

Methodology Applied

Scientific EffectPulsed-plating: Electroplating

Implementation Method 2

The second copper layer is formed using a DC plating process

Methodology Applied

Scientific EffectDC plating: Electroplating

Implementation Method 3

A wet etching process is performed to etch a portion of the under-bump layer

Methodology Applied

Scientific EffectWet etching:

Data Source

PatentUS10049997B2Semiconductor device and method of fabricating the same

Publication Date: 2018.08.14 SAMSUNG ELECTRONICS CO LTD

AI summary

A pad is disposed on a substrate. A bump structure is disposed on the pad and electrically connected to the pad. The bump structure includes a first copper layer and a second copper layer sequentially stacked on the pad and a solder ball on the second copper layer. A first X-ray diffraction (XRD) peak intensity ratio of (111) plane to (200) plane of the first copper layer is greater than a second XRD peak intensity ratio of (111) plane to (200) plane of the second copper layer.