Copper Interconnect Barrier Structure for Low RC Delay
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Solution Overview
Problem
Copper used in back end of line (BEOL) metallization layers and vias in electronic devices experiences high diffusion rates, leading to increased resistivity and semiconductor device failures, reducing manufacturing yield and electrical performance.
Innovation Solution
Implementing low-resistance copper interconnects with reduced tantalum nitride liner thickness or eliminating it, and using ruthenium (Ru) and zinc silicon oxide (ZnSiOx) as diffusion barriers to prevent copper ion diffusion into dielectric materials, thereby maintaining low contact resistance and sheet resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper is used in BEOL metallization layers and vias, then electrical performance is improved due to low resistivity, but diffusion rate increases leading to increased resistivity and device failures
Solution Approach 1:
The patent introduces ruthenium (Ru) and zinc silicon oxide (ZnSiOx) as intermediary diffusion barrier layers between copper interconnects and dielectric materials. These intermediary layers prevent copper ion diffusion while maintaining low contact resistance, directly resolving the contradiction between copper's low resistivity benefit and its harmful diffusion effect.
Solution Approach 2:
The patent employs composite material structures combining multiple layers: copper interconnects with reduced thickness, Ru diffusion barriers, ZnSiOx diffusion barriers, and adjusted tantalum nitride liner thicknesses. This composite approach leverages the low resistivity of copper while using Ru and ZnSiOx to suppress diffusion, achieving both low resistance and high reliability.
2Reliability
If tantalum nitride liner thickness is reduced or eliminated, then contact resistance decreases, but copper diffusion into dielectric materials increases
Solution Approach 1:
The patent replaces the traditional thick tantalum nitride liner with Ru and ZnSiOx intermediary layers that provide superior diffusion barrier properties at reduced thicknesses. These intermediaries prevent copper diffusion while maintaining low contact resistance, resolving the contradiction between liner thickness and contact resistance.
Solution Approach 2:
The patent changes the material parameters by substituting TaN with Ru and ZnSiOx, and adjusts the thickness parameters of these barrier layers to optimize both diffusion prevention and contact resistance. This parameter optimization allows thin barrier layers that maintain electrical performance while preventing diffusion.
3Speed
If copper interconnects are used, then signal propagation speed increases, but manufacturing yield decreases due to device failures
Solution Approach 1:
The patent introduces Ru and ZnSiOx as intermediary diffusion barriers that prevent copper ion migration into dielectric materials, eliminating the root cause of device failures. This maintains the high signal propagation speed benefit of copper interconnects while improving manufacturing yield by preventing reliability failures.
Solution Approach 2:
The patent creates a composite interconnect structure with copper cores and Ru/ZnSiOx barrier layers that combines the high conductivity of copper with the diffusion-blocking properties of the barrier materials. This composite structure maintains fast signal propagation while preventing the device failures that reduce manufacturing yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances electrical performance by decreasing RC time constants and increasing signal propagation speeds across electronic devices, while reducing semiconductor failures and manufacturing costs.
Implementation Method 1
using ruthenium (Ru) and zinc silicon oxide (ZnSiOx) as diffusion barriers to prevent copper ion diffusion into dielectric materials
Implementation Method 2
the trench and the vias are filled with a conductive material in the same plating operation (e.g., electroplating)
Data Source
AI summary
Implementations of low-resistance copper interconnects and manufacturing techniques for forming the low-resistance copper interconnects described herein may achieve low contact resistance and low sheet resistance by decreasing tantalum nitride (TaN) liner/film thickness (or eliminating the use of tantalum nitride as a copper diffusion barrier) and using ruthenium (Ru) and/or zinc silicon oxide (ZnSiOx) as a copper diffusion barrier, among other examples. The low contact resistance and low sheet resistance of the copper interconnects described herein may increase the electrical performance of an electronic device including such copper interconnects by decreasing the resistance/capacitance (RC) time constants of the electronic device and increasing signal propagation speeds across the electronic device, among other examples.