Copper Interconnection Etching via Noble Gas Plasma
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Solution Overview
Problem
Conventional methods for removing excess metal interconnection layers in integrated circuit fabrication, such as wet etching, result in undesirable lateral etching, leading to copper structure width loss, Ti layer undercut, and contamination issues, while anisotropic dry etching faces challenges with copper etching and residue implantation into dielectrics.
Innovation Solution
A method involving plasma etching with a noble gas, such as argon, to selectively remove excess metal, controlling etch duration to avoid complete removal from the dielectric layer, followed by chemical dry etching using fluorocarbons or chlorine to clear residues, with dynamic etch duration calculation using optical emission spectroscopy or secondary ion mass spectroscopy to minimize undercutting and contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wet etching is used to remove excess metal, then the etching process is simple and fast, but lateral etching occurs causing copper structure width loss and Ti layer undercut
Solution Approach 1:
The etching process is divided into two distinct stages: first, anisotropic dry etching removes the bulk of the excess metal with vertical directionality to preserve copper structure width; second, wet etching completes the removal of remaining metal. This segmentation allows each method to perform its optimal function while avoiding the drawbacks of using either method alone.
Solution Approach 2:
The invention changes the etching parameters by switching from isotropic wet etching to anisotropic dry etching for the primary etching step. This parameter change transforms the etching directionality from lateral to vertical, thereby preventing copper structure width loss and Ti layer undercut while maintaining efficient metal removal.
2Device complexity
If isotropic wet etching is used, then the process is simple, but carbon contamination occurs from dielectric decomposition
Solution Approach 1:
The invention replaces the chemical mechanism of isotropic wet etching with the physical mechanism of anisotropic dry etching for the primary etching step. This substitution eliminates carbon contamination from dielectric decomposition while maintaining process simplicity through the use of standard plasma etching equipment and protocols.
3Manufacturing precision
If anisotropic dry etching is used to avoid lateral etching, then copper structure width is preserved, but metal implantation into dielectric occurs causing leakage current
Solution Approach 1:
The invention extracts the harmful metal implantation issue by using a two-step process where anisotropic dry etching is carefully controlled to remove only the excess metal portion, and the subsequent wet etching step completes the removal without causing further implantation. This extraction approach isolates and eliminates the implantation problem while preserving the width control benefits.
4Reliability
If over-etching is performed to ensure complete metal removal, then all metal is removed, but carbon and oxygen contaminate the exposed metal surfaces forming metallic carbides
Solution Approach 1:
The invention performs preliminary action by using anisotropic dry etching to remove the majority of excess metal before the final wet etching step. This preliminary removal reduces the amount of metal that would otherwise require over-etching, thereby minimizing carbon and oxygen exposure time and preventing metallic carbide formation while ensuring complete metal removal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces lateral etching, minimizes carbon contamination, and prevents metal implantation into dielectrics, resulting in improved copper pillar width control and reliability by maintaining the metal layer free of residues and contaminants.
Implementation Method 1
an Argon, Ar, dry etch process can be used to physically sputter the Cu seed 12
Implementation Method 2
dynamic etch duration calculation using optical emission spectroscopy
Implementation Method 3
dynamic etch duration calculation using optical emission spectroscopy or secondary ion mass spectroscopy
Data Source
AI summary
A method of fabricating an integrated circuit is disclosed. The method of removing excess metal of a metal interconnection layer during integrated circuit fabrication process comprises the steps of: plasma etching an excess metal portion of the metal interconnection layer using plasma comprising a noble gas, for an etch duration. The method further comprises stopping the etch process prior to the excess metal portion being completely removed and thus prior to a dielectric surface upon which the metal interconnection is formed, becoming completely exposed. The remaining excess metal portion comprising excess metal residues is subsequently removed using a second etch step.