Copper Post IC Packaging for Height Reduction and Signal Integrity

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Solution Overview

Problem

Modern electronics require increased functionality in integrated circuit packaging with reduced size and cost, but existing technologies fail to adequately address the need for lower height, smaller size, simplified manufacturing, and cost reduction while maintaining performance and reliability.

Innovation Solution

The method involves forming copper posts on a copper film with an insulation layer and conductive via, attaching an interposer with a solder pad, and using these copper posts to connect the interposer to a substrate, simplifying manufacturing and enhancing signal transfer and heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If existing manufacturing methods are used, then manufacturing simplicity is maintained, but package dimensions are reduced

Engineering Contradiction:
Improvepackage dimensionsVSAvoidmanufacturing simplicity
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The package structure is divided into distinct functional layers including a substrate with through-holes, an insulation layer, conductive vias, and metal interconnect layers. This segmentation allows each layer to be manufactured and processed independently using existing techniques, maintaining manufacturing simplicity while achieving compact overall dimensions through precise layer integration

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from planar two-dimensional circuit布局 to three-dimensional vertical stacking with multiple metal layers and conductive vias. This dimensional change enables increased functionality and reduced package footprint by utilizing the vertical dimension for signal routing and interconnects, thereby reducing package dimensions without complicating the manufacturing process

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If package size is reduced, then space efficiency is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvepackage sizeVSAvoidmanufacturing complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The substrate serves multiple functions simultaneously: it provides mechanical support, electrical connectivity through through-holes, and a foundation for mounting the integrated circuit. The insulation layer both electrically isolates conductive elements and provides a structural platform for subsequent layers. This multi-functionality reduces the need for additional components and layers, thereby reducing package size without increasing manufacturing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The through-holes are formed and plated with conductive material in the substrate before the insulation layer is applied. This preliminary action establishes the electrical interconnect paths in advance, allowing subsequent layers to be processed independently and in parallel. This sequencing simplifies manufacturing while enabling compact three-dimensional integration that reduces overall package size

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves manufacturing yield, reduces electric noise, increases reliability, and enhances packaging density by allowing for a higher number of input-output connections and better heat dissipation, while reducing package height and cost.

Implementation Method 1

copper posts to connect the interposer to a substrate, simplifying manufacturing and enhancing signal transfer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

enhances packaging density by allowing for a higher number of input-output connections and better heat dissipation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

attaching an interposer on the copper post with a solder pad

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS9693455B1Integrated circuit packaging system with plated copper posts and method of manufacture thereof
Publication Date: 2017.06.27 STATS CHIPPAC MANAGEMENT PTE LTD
  • US9693455B1 patent drawing
  • US9693455B1 patent drawing
  • US9693455B1 patent drawing

AI summary

A system and method of manufacture of an integrated circuit packaging system includes: a copper film; a first metal layer directly on the copper film; an insulation layer directly on and over the first metal layer, the insulation layer having a via hole through the insulation layer; a conductive via within the via hole and directly on the first metal layer; a second metal layer directly on the conductive via and the insulation layer; a copper post directly on the copper film; a solder pad over the copper post; and an interposer coupled to the copper post and the solder pad.