Copper TFT Array Fabrication Using Patterned Electrodeposition

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Solution Overview

Problem

The manufacturing process of copper-based Thin Film Transistors (TFTs) for display panels faces challenges such as etching differences, leading to low yield and high costs due to the need for etching processes.

Innovation Solution

A manufacturing method involving electrochemical deposition to form a copper alloy metal layer on a glass substrate, where a buffer layer with a preset pattern is formed, and the copper alloy metal layer is deposited and annealed to create a first metal layer, eliminating the need for etching and improving yield and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an etching process is used to form the first metal layer in copper-based TFT manufacturing, then the metal layer pattern can be formed, but the yield decreases and cost increases due to etching differences

Engineering Contradiction:
Improvemetal layer pattern precisionVSAvoidmanufacturing yield
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

Instead of forming a complete metal layer and then etching it to create patterns, the patent inverts the approach by using electrochemical deposition to directly form metal layers only in the desired pattern areas. The buffer layer with preset pattern serves as a template, and copper ions are deposited only where needed through electrochemical reactions, eliminating the etching step entirely while maintaining pattern precision and improving yield.

Inventive Principle:
Principle #13The other way round (Inversion)

2Manufacturing precision

If an etching process is used to form the first metal layer, then the metal pattern can be created, but the manufacturing cost increases

Engineering Contradiction:
Improvemetal layer pattern precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent extracts and removes the etching process from the manufacturing sequence. By using electrochemical deposition with a buffer layer template, the method directly creates the final metal layer pattern without requiring the intermediate etching step, thereby reducing manufacturing complexity and cost while maintaining the necessary pattern precision.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If aluminum is used for the gate electrode, then the manufacturing process is simpler, but the electronic transport speed is insufficient due to low conductivity

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidelectronic transport speed
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The patent changes the material parameter of the gate electrode from aluminum to copper, which has significantly higher electrical conductivity. This material substitution directly improves electronic transport speed while the electrochemical deposition method maintains manufacturing simplicity by providing a direct deposition process without complex etching steps.

Inventive Principle:
Principle #35Parameter changes

4Productivity

If a buffer layer with preset pattern is used for electrochemical deposition, then the etching process can be eliminated, but the device complexity increases

Engineering Contradiction:
Improvemanufacturing yieldVSAvoidprocess structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The buffer layer with preset pattern is formed in advance before the copper deposition step. This preliminary patterning action creates a template that guides the subsequent electrochemical deposition, allowing the copper to deposit only in the desired areas. This approach simplifies the overall process by eliminating etching while the buffer layer serves as a reusable template that can be integrated into existing manufacturing workflows.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the yield and reduces costs by eliminating the etching process, while ensuring better conductivity and performance through the formation of a copper alloy metal layer with improved bonding strength and passivation protection.

Implementation Method 1

placing the glass substrate with the buffer layer formed thereon into an electrochemical deposition device, and performing electrochemical deposition to form a copper alloy metal layer corresponding to the buffer layer

Methodology Applied
Scientific EffectElectrochemical deposition: Electrodeposition

Implementation Method 2

heating and annealing the copper alloy metal layer to form a first metal layer

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11791349B2Manufacturing method for display panel and display panel
Publication Date: 2023.10.17 BEIHAI HKC OPTOELECTRONICS TECH CO LTD
  • US11791349B2 patent drawing
  • US11791349B2 patent drawing
  • US11791349B2 patent drawing

AI summary

The present application discloses a manufacturing method for a display panel and the display panel, and the manufacturing method includes a manufacture procedure of forming an array substrate, where the manufacture procedure of forming an array substrate includes: forming a buffer layer with a preset pattern on a glass substrate; placing the glass substrate with the buffer layer formed thereon into an electrochemical deposition device, and performing electrochemical deposition to form a copper alloy metal layer corresponding to the buffer layer; heating and annealing the copper alloy metal layer to form a first metal layer; sequentially forming an insulating layer, an active layer, a second metal layer, a passivation layer and a transparent electrode layer on the first metal layer, where the first metal layer includes a buffer layer and a copper alloy metal layer.