Copy Propagation in Distributed Register File Processors

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Solution Overview

Problem

Traditional copy propagation methods for processors with cluster-based architectures and irregular register files, such as modern digital signal processors (DSPs), often result in high frequencies of improper copy propagations, failing to consider inter/intra communication costs effectively.

Innovation Solution

A method for copy propagation in a Parallel Architecture Core (PAC) processor that involves building a data flow graph, listing all possible copy propagation paths, and performing a cost-benefit analysis to calculate the profit of machine cycles, where copy propagation occurs if the profit is greater than a threshold value, considering reduced register communication costs and extra cycles due to port constraints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional copy propagation methods are applied to cluster-based architectures with irregular register files, then code optimization is performed, but high frequencies of improper copy propagations occur due to ignoring inter/intra communication costs

Engineering Contradiction:

Improvecode optimization efficiencyVSAvoidcopy propagation accuracy

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent changes the parameters considered in copy propagation by introducing communication cost metrics (inter-cluster and intra-cluster costs) as key evaluation parameters. The cost model incorporates machine cycle counts, register file access costs, and data transfer costs to dynamically evaluate whether copy propagation is beneficial, transforming the traditional approach that only considered optimization potential without communication overhead.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism through cost-benefit analysis that evaluates the impact of copy propagation on overall execution time. The cost model provides feedback about communication overhead and machine cycle implications, allowing the compiler to make informed decisions about whether to perform copy propagation based on the specific architectural context and data flow patterns.

Inventive Principle:

Principle #23Feedback

2Loss of energy

If copy propagation is performed without considering port constraints of the global register file, then register communication costs are reduced, but extra cycles are caused by separation of code fragment bundles

Engineering Contradiction:

Improveregister communication costsVSAvoidextra machine cycles

Core Design Contradiction:

Loss of energyVSLoss of time

Solution Approach 1:

The patent changes the evaluation parameters to include both communication cost savings and time cost penalties. The cost model quantifies extra machine cycles caused by bundle separation due to port constraints, comparing these against the communication cost savings from reduced register accesses. This dual-parameter approach enables balanced optimization that trades off communication efficiency against execution time.

Inventive Principle:

Principle #35Parameter changes

3Loss of substance

If copy propagation paths are optimized without cost-benefit analysis, then code size is reduced, but performance anomalies occur in embedded VLIW DSP processors

Engineering Contradiction:

Improvecode fragment sizeVSAvoidprocessor performance

Core Design Contradiction:

Loss of substanceVSProductivity

Solution Approach 1:

The patent changes the optimization criteria from simple code size reduction to a comprehensive cost-benefit analysis that includes performance metrics. The cost model evaluates machine cycle impacts, communication overhead, and architectural constraints to determine whether copy propagation will actually improve or degrade performance, preventing performance anomalies in VLIW DSP processors.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS8051411B2Method for copy propagations for a processor with distributed register file design

Publication Date: 2011.11.01 NATIONAL TSING HUA UNIVERSITY

AI summary

A method for copy propagations of a processor including two clusters, each cluster comprising a first function unit and a second function unit, a first local register file and a second local register file being respectively accessible by the first and second function unit only, and a global register file having a ping-pong structure to access the first and second local register files, the method comprising the steps of: (a) listing possible copy propagation paths between two nodes of a data flow graph; (b) calculating a profit of machine cycles for each of the copy propagation paths according to constraints of the processor; and (c) performing a copy propagation through the copy propagation path if the profit thereof is greater than a threshold value.