Core-Embedded IPD Shielding for High-Density Chip Package Vias
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Solution Overview
Problem
Conventional chip packaging schemes face limitations in via density due to increased noise and parasitic effects when vias are placed too close to inductors, necessitating a need for improved substrate design.
Innovation Solution
Embedding integrated passive devices, such as capacitors, in the core of the substrate to shield routings coupled to inductors from adjacent through-substrate conductive paths, reducing the required 'keep-out' space and increasing via density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vias are placed close to inductors to increase via density, then via density improves, but noise and parasitic effects increase
Solution Approach 1:
An integrated passive device (IPD) is introduced as an intermediary element positioned between the inductor routing via and adjacent signal transmission or ground/power routing vias. The IPD acts as a shielding structure that blocks electromagnetic noise and parasitic coupling from propagating between the inductor via and nearby vias, enabling closer via placement while maintaining signal integrity
Solution Approach 2:
The solution transitions from a two-dimensional planar arrangement of vias to a three-dimensional structure by embedding the IPD within the substrate core. This vertical dimensionality allows the IPD to effectively shield routings by positioning it between conductive paths in the depth direction, reducing the required horizontal keep-out space around inductors
2Reliability
If keep-out space around inductors is increased to reduce noise, then signal integrity improves, but via density decreases
Solution Approach 1:
The IPD serves as a localized shielding intermediary that provides noise protection without requiring extensive keep-out zones. By placing the IPD immediately adjacent to the inductor routing via, it creates an effective electromagnetic barrier that maintains signal integrity while minimizing the space required for noise reduction
3Quantity of substance
If integrated passive devices are embedded in the core to shield routings, then via density and signal integrity improve, but device complexity increases
Solution Approach 1:
The IPD is merged with the substrate core structure, combining the shielding function with the existing substrate architecture. This integration approach embeds the passive device within the substrate's internal layers, utilizing the same manufacturing processes and material structures already present in the substrate, thereby reducing overall device complexity compared to adding separate shielding components
Solution Approach 2:
The integrated passive device serves multiple functions simultaneously: it provides electromagnetic shielding for noise reduction, acts as a routing separator to enable closer via placement, and can function as an electrical component (capacitor, inductor, or resistor) within the circuit. This multi-functionality reduces the need for separate dedicated shielding structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances via density, improves signal integrity, and increases capacitance for better device performance, while also freeing up space for power routing and reducing ohmic loss.
Implementation Method 1
integrated passive devices embedded in a core of a substrate of the chip package, such as a package substrate or an interposer, that shield routings coupled to inductors from adjacent through-substrate conductive paths
Data Source
AI summary
Chip packages are described herein that includes integrated passive devices embedded in a core of a substrate of the chip package, such as a package substrate or an interposer, that shield routings coupled to inductors from adjacent through-substrate conductive paths (e.g., vias). In one example, a chip package includes an integrated circuit (IC) die mounted to a substrate. A core of the substrate has a plurality of inductor routing vias, a plurality of signal transmission vias, and a plurality of ground and power routing vias. A first integrated passive device (IPD) is disposed in the core and separates at least one of the plurality of inductor routing vias from an adjacent via, the adjacent via being one of the plurality of signal transmission vias or one of the plurality of ground and power routing vias.


