Core-Shell Chalcogenide Switching Device for Leakage Control
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Solution Overview
Problem
In three-dimensional cross point array memory devices, such as PRAM and RRAM, the generation of sneak currents and increased leakage currents due to sidewall defects in ovonic threshold switching devices poses challenges, affecting the selection function and power consumption.
Innovation Solution
A core-shell structured switching device is implemented, where the shell portion has a higher electrical resistance than the core portion, reducing leakage currents by directing most current flow through the core, and additional shell layers cover the core's surfaces to further minimize sidewall leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional switching device structure is used in three-dimensional cross point array memory devices, then the device can be manufactured with standard processes, but sneak currents and leakage currents increase due to sidewall defects
Solution Approach 1:
The switching material layer is designed with non-uniform composition: a first region with lower chalcogenide concentration (lower resistance) and a second region with higher chalcogenide concentration (higher resistance). This local quality variation directs current preferentially through the first region, reducing sneak currents along sidewalls and improving selection function while lowering leakage current.
Solution Approach 2:
The switching material layer uses a composite chalcogenide system (Ge-Sb-Te-In) with spatially varying composition. The combination of different chalcogenide concentrations creates distinct electrical properties in different regions, enabling the device to simultaneously achieve low leakage current and reliable switching operation in three-dimensional cross point arrays.
2Loss of energy
If the switching material layer has high electrical resistance to reduce leakage, then leakage current decreases, but the device requires higher operating voltage and power consumption increases
Solution Approach 1:
The switching material layer is designed with non-uniform composition: a first region with lower chalcogenide concentration (lower resistance) and a second region with higher chalcogenide concentration (higher resistance). This local quality variation directs current preferentially through the first region, reducing sneak currents along sidewalls and improving selection function while lowering leakage current.
Solution Approach 2:
The switching material layer uses a composite chalcogenide system (Ge-Sb-Te-In) with spatially varying composition. The combination of different chalcogenide concentrations creates distinct electrical properties in different regions, enabling the device to simultaneously achieve low leakage current and reliable switching operation in three-dimensional cross point arrays.
3Loss of energy
If the core portion cross-sectional size is increased to reduce resistance, then current flow improves, but the shell portion coverage area decreases and sidewall leakage increases
Solution Approach 1:
The patent optimizes the ratio of core portion cross-sectional size to switching material layer cross-sectional size to be between 0.2 and 0.8. This parameter control ensures sufficient core area for low-resistance current flow while maintaining adequate shell portion coverage for sidewall protection, preventing sneak currents in three-dimensional cross point array structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The core-shell structure effectively reduces leakage currents, enhancing the low power driving capability and maintaining the integrity of the three-dimensional array structure by minimizing cross-talk between memory cells.
Implementation Method 1
a phase change layer between the second electrode and the third electrode. The phase change layer includes a chalcogen element and at least one of Ge, As, or Sb
Implementation Method 2
The switching material layer includes a core portion and a shell portion, the shell portion covering a side surface of the core portion and including a material having an electrical resistance greater than an electrical resistance of the core portion
Implementation Method 3
The switching material layer may further include an interface layer provided on an upper surface of the core portion and having a p-n junction with the core portion or having a Schottky junction with the core portion
Data Source
AI summary
Provided are a switching device and a memory device including the switching device. The switching device includes first and second electrodes, and a switching material layer provided between the first and second electrodes and including a chalcogenide. The switching material layer includes a core portion and a shell portion covering a side surface of the core portion. The switching layer includes a material having an electrical resistance greater than an electrical resistance of the core portion, for example in at least one of the core portion or the shell portion.