Core Voltage Boosting Circuit for Stable Semiconductor Sensing
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Solution Overview
Problem
Conventional semiconductor devices experience instability and malfunctions due to transient voltage drops during mismatch compensation and sensing operations in core circuits, leading to degraded sensing margins and potential malfunctions.
Innovation Solution
A semiconductor device with a boosting circuit that detects voltage drops during mismatch compensation and supplies boosting power to the core circuit during sensing operations, using a control circuit, comparison voltage generating circuit, voltage comparator array, code converting circuit, and current supplying circuit to stabilize the core voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If mismatch compensation operation is performed continuously, then offset compensation is improved, but core voltage stability deteriorates
Solution Approach 1:
The boosting circuit performs preliminary action by detecting voltage drops during the mismatch compensation operation and proactively supplying boosting power before the voltage drop affects the sensing operation. This ensures that the core voltage is maintained at an appropriate level throughout both operations, resolving the contradiction between continuous mismatch compensation and voltage stability.
2Productivity
If sensing operation is performed continuously, then sensing speed is improved, but sensing margin deteriorates
Solution Approach 1:
The boosting circuit implements feedback by continuously monitoring the core voltage level and automatically adjusting the boosting power supply based on detected voltage drops. This feedback mechanism ensures that continuous sensing operations maintain both high speed and adequate sensing margin, as the boosting power is dynamically adjusted to compensate for voltage drops caused by mismatch compensation.
Data Source
AI summary
A semiconductor device includes a driving circuit configured to generate a core voltage using a power supply voltage; a core circuit configured to perform a first operation and a second operation following the first operation, using the core voltage; and a boosting circuit configured to supply a boosting power to the core circuit, wherein the boosting circuit detects a voltage drop in the core voltage for a predetermined duration during the first operation, and supplies the boosting power, corresponding to the voltage drop, to the core circuit during the second operation.