Coreless IC Packaging Substrate with Embedded Conductive Studs
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Solution Overview
Problem
Current integrated circuit packaging systems face challenges in achieving simplified manufacturing processes, smaller dimensions, lower costs, increased functionality, and improved reliability while meeting competitive pressures and consumer expectations, with existing solutions failing to provide a comprehensive solution for these needs.
Innovation Solution
The method involves forming a base substrate with a sacrificial carrier, mounting a metallic sheet, applying a top trace and forming a conductive stud, encapsulating these elements, and then removing the carrier and sheet to mount an integrated circuit device, which is further encapsulated with a top encapsulation, resulting in a coreless substrate with embedded conductive structures for enhanced electrical connectivity and support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional semiconductor printing methods are used to form conductive structures, then manufacturing precision can be maintained, but manufacturing time and complexity increase significantly
Solution Approach 1:
The patent extracts and removes the sacrificial carrier and metallic sheet after forming the conductive structures, eliminating the need for complex semiconductor printing methods. This extraction approach simplifies the manufacturing process while maintaining precision, directly resolving the contradiction between ease of manufacture and manufacturing time.
Solution Approach 2:
The conductive structures are formed preliminarily on the sacrificial carrier before final assembly. By pre-forming the conductive traces and studs on the removable carrier, the patent enables simpler subsequent manufacturing steps, reducing overall manufacturing cycle time while maintaining precision.
2Length of moving object
If traditional packaging substrates with cores are used, then structural support is provided, but package height and material costs increase
Solution Approach 1:
The patent removes the traditional substrate core entirely, extracting only the essential functional elements (conductive structures) while eliminating the bulky core material. This extraction enables low-profile packaging while distributing structural support across the encapsulation and mounting structures rather than relying on a central core.
Solution Approach 2:
The patent uses thin encapsulation layers and flexible mounting structures to provide the necessary structural support without requiring a thick traditional substrate core. The encapsulation acts as a flexible shell that maintains package integrity while enabling reduced height.
3Adaptability or versatility
If complex integrated circuit packages with multiple components are used, then functionality and IO connectivity are improved, but manufacturing complexity and costs increase
Solution Approach 1:
The patent creates a universal base substrate design with standardized conductive structures that can accommodate multiple integrated circuit devices with different IO connectivity requirements. This multi-functional base design simplifies manufacturing while maintaining adaptability to various device configurations.
Solution Approach 2:
The patent segments the packaging system into a reusable base substrate with conductive structures and removable sacrificial carrier. This segmentation allows the complex conductive pattern formation to be performed once on the carrier, then transferred to multiple packages, reducing per-unit manufacturing complexity and cost.
Data Source
AI summary
A system and method for manufacturing an integrated circuit packaging system includes: forming a base substrate including: providing a sacrificial carrier: mounting a metallic sheet on the sacrificial carrier, applying a top trace to the metallic sheet, forming a conductive stud on the top trace, forming a base encapsulation over the metallic sheet, the top trace, and the conductive stud, the top trace exposed from a top surface of the base encapsulation, and removing the sacrificial carrier and the metallic sheet; mounting an integrated circuit device on the base substrate; and encapsulating the integrated circuit device and the base substrate with a top encapsulation.


