Coreless Multilayer Substrate Pad Capacitance Reduction

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Solution Overview

Problem

The coreless multilayer resin substrates experience excessive pad capacitance at high frequencies, which adversely affects the quality of electrical signals, hindering the adoption of this technology as a dominant packaging solution despite its lower manufacturing costs compared to traditional core packages.

Innovation Solution

A coreless multilayer substrate design is implemented with a first and second metallic layer separated by insulating layers of different dielectric constants, and an air gap is formed between the BGA pad and the conductive member to reduce excessive capacitance, enhancing signal quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a coreless multilayer substrate structure is used, then manufacturing cost is reduced, but pad capacitance increases excessively at high frequencies

Engineering Contradiction:
Improvemanufacturing costVSAvoidsignal quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by using insulating layers with different dielectric constants in specific locations. The first insulating layer has a first dielectric constant while the second insulating layer has a second dielectric constant that is different from the first, allowing optimization of pad capacitance in the critical pad region while maintaining the overall coreless structure's manufacturing advantages.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the dielectric parameter (dielectric constant) of the insulating layers to control pad capacitance. By selecting insulating layers with different dielectric constants, the patent optimizes the electrical characteristics at high frequencies while preserving the cost benefits of the coreless design.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If insulating layers with different dielectric constants are used, then pad capacitance is reduced and signal quality is improved, but device complexity increases

Engineering Contradiction:
Improvesignal qualityVSAvoidsubstrate structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the insulating structure into multiple layers with different dielectric constants. The first insulating layer and second insulating layer are positioned at different locations, with each layer having optimized dielectric properties for its specific function, thereby managing complexity through functional segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent manages complexity by organizing the different dielectric constant layers in a vertical stacked arrangement rather than spreading complexity horizontally. The first and second insulating layers are stacked with specific spacing relationships, utilizing the vertical dimension to manage structural complexity while achieving the desired electrical performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly improves signal characteristics by reducing insertion losses and maintaining signal quality at high frequencies, making coreless packaging a viable alternative to traditional core packages.

Implementation Method 1

The first insulating layer and the second insulating layer are in lateral abutment, with each having a different dielectric constant

Methodology Applied
Scientific EffectDielectric: Dielectric

Implementation Method 2

an air gap is formed between the BGA pad and the conductive member to reduce excessive capacitance, enhancing signal quality

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9060428B2Coreless multi-layer circuit substrate with minimized pad capacitance
Publication Date: 2015.06.16 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US9060428B2 patent drawing
  • US9060428B2 patent drawing
  • US9060428B2 patent drawing

AI summary

A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.