Fast Two-Sided Corrective Read in Memory Devices
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Solution Overview
Problem
Existing memory devices require significant time for corrective read operations due to the need for additional read operations to account for interference from neighbor memory cells, which affects performance and quality of service in memory sub-systems.
Innovation Solution
A fast two-sided corrective read operation is implemented by performing a single additional read operation that determines the state of each neighbor memory cell before the main read operation, using a local media controller to apply different voltages to the selected and neighbor memory cells to assess their state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional corrective read operations are performed to account for interference from neighbor memory cells, then data accuracy is improved, but read time increases significantly (approximately three times normal read time)
Solution Approach 1:
The patent performs a preliminary read operation on the selected memory cell before the main read operation. This preliminary action determines the state of the selected cell and enables dynamic adjustment of voltages applied to neighbor memory cells during the corrective read, thereby reducing the total time required while maintaining data accuracy
Solution Approach 2:
The patent dynamically adjusts the voltage applied to neighbor memory cells based on the state determined from the preliminary read operation. Instead of using fixed voltage levels, the system adapts the voltage dynamically - applying higher voltage only when interference is detected and lower voltage when no interference is present, thus reducing overall read time while maintaining accuracy
2Reliability
If additional read operations are performed to detect neighbor cell states, then interference compensation is improved, but operational complexity increases
Solution Approach 1:
The patent uses a single preliminary read operation that serves multiple purposes: it detects the state of the selected memory cell, determines the presence of interference from neighbor cells, and provides information for voltage adjustment. This multi-functional approach improves reliability without proportionally increasing operational complexity
Data Source
AI summary
A memory device includes an array associated with a plurality of wordlines and control logic that causes a first voltage to be applied to a first wordline associated with a selected memory cell, causes a second voltage, having a lower magnitude than the first voltage, to be applied to a second wordline adjacent to the first wordline and associated with a first neighbor memory cell, and causes a third voltage, having a lower magnitude than the first voltage, to be applied to a third wordline adjacent to the first wordline and associated with a second neighbor memory cell. The control logic identifies a first corrective read voltage in response to determining that current flows through the first and second neighbor memory cells and the selected memory cell and causes the first corrective read voltage to be applied to the first wordline during a read operation for the selected memory cell.