Correlated Electron Switch for Scalable Non-Volatile Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current non-volatile memory technologies face challenges in achieving scalability below 65 nanometers, stability over time and temperature, and efficient resistance switching, with existing resistance-based memories exhibiting high currents, stochastic behavior, and fatigue issues.
Innovation Solution
The development of a Correlated Electron Material (CEM) based Correlated Electron Switch (CES) that utilizes a quantum mechanical Mott transition for abrupt conductor/insulator transitions, allowing for low power, high speed, and high density memory operations without the need for electroforming, and is scalable to smaller sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If phase change memory (PCM/PCRAM) devices are used for non-volatile storage, then resistance change occurs through melting and cooling, but the transition cannot be sufficiently controlled for useful memory applications
Solution Approach 1:
The patent changes the fundamental mechanism from thermal phase transition to electrochemical ion migration. By applying voltage pulses, ions (such as oxygen vacancies or metal ions) are migrated to form or break conductive filaments, enabling precise control of resistance states without uncontrolled melting and solidification
Solution Approach 2:
The patent replaces the mechanical/thermal process of melting and cooling with an electrochemical process. Instead of using heat to change material phase, voltage-driven ion migration is used to create conductive paths, providing deterministic and controllable resistance switching
2Reliability
If resistive RAMs (ReRAMs) or conductive bridge RAMS (CBRAM) are used, then variable resistance function is activated by electroforming, but operation is strongly temperature dependent and highly stochastic
Solution Approach 1:
The patent modifies the operating mechanism by using controlled ion migration through engineered defect structures rather than stochastic filament formation. The use of specific materials (oxynitride layers, doped regions) and controlled voltage pulses creates deterministic resistance switching that is not strongly temperature dependent
Solution Approach 2:
The patent introduces intermediary structures such as oxynitride layers, doped semiconductor regions, or insulator layers with controlled defect densities. These intermediaries facilitate controlled ion migration and provide stable, reproducible resistance switching behavior that reduces stochastic effects and temperature dependence
3Quantity of substance
If flash memory devices are used for non-volatile storage, then high bit density is achieved, but scalability below 65 nanometers is limited
Solution Approach 1:
The patent uses a crossbar array architecture where memory elements are segmented into a grid of intersecting word lines and bit lines. Each intersection contains a memory element, enabling high density through systematic segmentation of the memory space into addressable units that can be scaled to smaller dimensions
Solution Approach 2:
The patent transitions from planar or vertical stacking to a three-dimensional crossbar architecture. By utilizing intersecting lines in multiple dimensions (horizontal and vertical word/bit lines), the memory achieves higher density and better scalability to small feature sizes through spatial efficiency in three-dimensional space
4Reliability
If ReRAM/CBRAM systems are used for resistance switching, then conducting filaments are formed stochastically, but this leads to fatigue over many memory cycles
Solution Approach 1:
The patent introduces intermediary layers (oxynitride, doped regions, insulators with controlled defects) that mediate the resistance switching process. These intermediaries provide stable ion transport paths and prevent uncontrolled filament formation, enabling deterministic switching that does not fatigue over cycles
Solution Approach 2:
The patent changes the switching mechanism from stochastic filament formation to controlled ion migration through engineered structures. By controlling ion movement through voltage pulses and engineered defect structures, the system achieves reproducible, fatigue-free switching with deterministic resistance changes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The CES device achieves stable and deterministic resistive switching with a resistance change of over 100 times between states, enabling scalable and efficient non-volatile memory operations with improved endurance and reduced power consumption.
Implementation Method 1
The CES device may be placed in a conductive or low impedance memory state or an insulative or high impedance memory state based, at least in part, on a transition of the CES between a conductive state and an insulative state responsive to a quantum mechanical Mott transition
Data Source
AI summary
Disclosed are methods, systems and devices for operation of dual non-volatile memory devices. In one aspect, a pair of non-volatile memory device coupled in series may be placed in complementary memory states any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device.