Corrugated Trench Capacitor Structure for Higher Capacitance Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices with trench capacitors face challenges in increasing capacitance per unit area without increasing trench depth, which is difficult due to the high aspect ratio geometry, making it hard to form trenches and capacitor components effectively.
Innovation Solution
The semiconductor memory device incorporates a semiconductor-on-insulator substrate with alternating silicon germanium and silicon epitaxial layers, a buried oxide layer, and a silicon device layer, featuring trenches with corrugated sidewalls and fin-like electrodes to increase sidewall surface area without deepening the trench, along with silicide layers for electrical connections and reduced resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If trench depth is increased to improve capacitance per unit area, then capacitance increases, but manufacturing difficulty increases due to high aspect ratio geometry
Solution Approach 1:
The patent transforms the capacitor structure from a conventional planar bottom electrode design to a trench capacitor with extended sidewall surfaces. By utilizing the vertical sidewalls of the trench as additional capacitor electrode surfaces, the effective capacitance area is increased without proportionally increasing trench depth, thereby reducing the aspect ratio and manufacturing complexity.
Solution Approach 2:
The patent employs a multi-layered trench structure where capacitor dielectric layers and electrode layers are nested within the trench. The trench capacitor is integrated within the semiconductor device structure, with the trench penetrating through multiple layers including the semiconductor substrate, isolation layer, and electrode layers, creating a compact nested configuration that maximizes capacitance within limited vertical space.
2Quantity of substance
If trench depth is increased to maximize capacitance, then capacitance per unit area improves, but device complexity increases
Solution Approach 1:
The invention utilizes the trench sidewall surface area as an additional dimension for capacitance generation. By forming capacitor electrodes on the trench sidewalls rather than only at the bottom, the effective capacitance area is expanded into the vertical dimension without requiring excessive trench depth, thus improving capacitance per unit area while controlling device complexity.
Solution Approach 2:
The capacitor structure is segmented into multiple components: bottom electrode, sidewall electrodes, and node dielectric layers. The trench is divided into functional regions with different materials and purposes, allowing each segment to be optimized independently for its specific function while contributing to the overall capacitance.
Data Source
AI summary
A semiconductor memory device includes a substrate; a film stack on the substrate; a silicon device layer on the film stack; and a trench with corrugated sidewall surface extending into the silicon device layer, the film stack, and the substrate. A trench capacitor is located in the trench. The trench capacitor includes an inner electrode and an outer electrode with a node dielectric layer therebetween. The node dielectric layer is in direct with the film stack and the bulk semiconductor substrate. A transistor is disposed on the substrate. The transistor includes a source region and a drain region, a channel region between the source region and the drain region, and a gate over the channel region. The source region is electrically connected to the inner electrode of the trench capacitor.