Count Value Generation Circuit for Phase-Accurate Frequency Measurement

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Solution Overview

Problem

Existing frequency counters using multiple frequency delta sigma modulators in parallel face challenges in improving accuracy due to large clock skew caused by different phase signals, which affects the precision of count values.

Innovation Solution

A count value generation circuit that includes a first counter for synchronizing with a reference signal, a time digital value generator to calculate phase differences, and a count integrated value combiner to generate accurate count values by integrating the phase differences, reducing the reliance on multiple signals with different phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple frequency delta sigma modulators are arranged in parallel to perform frequency counting, then measurement capability is improved, but clock skew increases and measurement precision deteriorates

Engineering Contradiction:
Improvemeasurement capabilityVSAvoidcount value accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent divides the frequency measurement function into two separate modules: a direct count module that counts reference clock cycles during the input signal period, and a reciprocal count module that counts input signal cycles during the reference clock period. This segmentation allows each module to operate independently with its own timing mechanism, eliminating the clock skew problem that arises when multiple modulators share a common clock signal with phase differences.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements reciprocal counting by inverting the traditional counting approach. Instead of only counting reference clock cycles (direct count), it also counts input signal cycles (reciprocal count) and combines both results. This inversion strategy provides redundant measurement paths that compensate for each other's limitations and improve overall measurement accuracy without requiring synchronized multiple clock signals.

Inventive Principle:
Principle #13The other way round (Inversion)

2Adaptability or versatility

If multiple signals with different phases are used for frequency counting, then measurement coverage is improved, but device complexity increases

Engineering Contradiction:
Improvemeasurement coverageVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal frequency measurement circuit that can measure both high and low frequencies by integrating direct count and reciprocal count functionalities into a single system. The same circuit structure handles both counting modes, making the system multi-functional without requiring separate dedicated circuits for different measurement scenarios. This universal approach simplifies the overall device architecture compared to using multiple specialized modulators.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the direct count and reciprocal count functions into a unified frequency measurement system. Both counting operations share common components such as the period measurement unit and the final calculation logic, reducing the total component count and circuit complexity. This combination eliminates the need for multiple independent frequency delta sigma modulators while maintaining comprehensive measurement coverage.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10560101B2Count value generation circuit, physical quantity sensor module, and structure monitoring device
Publication Date: 2020.02.11 SEIKO EPSON CORP
  • US10560101B2 patent drawing
  • US10560101B2 patent drawing
  • US10560101B2 patent drawing

AI summary

A count value generation circuit includes a first counter that counts edges of a reference signal to generate a first count value in synchronization with an input signal, a time digital value generator that generates a time digital value corresponding to a phase difference between the reference signal and the input signal, a count integrated value combiner that outputs a difference between an integer multiple of the first count value and the time digital value, and a count value generator that generates a count value based on a difference between a first output value and a second output value output from the count integrated value combiner.