Arithmetic Counter Circuit for Concurrent CMOS Sensor Readout
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Solution Overview
Problem
Current high-speed CMOS image sensors face limitations in frame rate due to row time constraints and struggle to achieve high dynamic range, which restricts their applications in capturing a wide range of illumination conditions from night to bright sunlight.
Innovation Solution
A multiple-row concurrent readout scheme and high dynamic range sub-sampling architecture are implemented, allowing concurrent readout of multiple rows of pixels and using different integration times for super rows to achieve seamless mode changes and enhanced Signal-to-Noise Ratio, along with an arithmetic counter circuit for advanced image processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multiple-row concurrent readout scheme is implemented, then frame rate is improved, but device complexity increases
Solution Approach 1:
The pixel array is divided into multiple independent row groups, each with its own readout circuitry. This segmentation allows concurrent readout of multiple rows simultaneously, thereby increasing frame rate while managing complexity through modular organization of readout paths.
Solution Approach 2:
The patent transitions from sequential row-by-row readout to parallel concurrent readout by adding temporal dimensionality. Multiple rows are read out simultaneously across different time slots and circuit paths, effectively utilizing dimensional expansion to improve productivity without linearly increasing complexity.
2Adaptability or versatility
If different integration times are used for super rows, then dynamic range is improved, but manufacturing precision requirements increase
Solution Approach 1:
The system dynamically changes the integration time parameter for different super rows to achieve high dynamic range. By varying integration times across multiple rows, the sensor can capture both dim and bright scenes simultaneously, extending the usable dynamic range while managing precision requirements through controlled parameter variation.
Solution Approach 2:
The integration time is made dynamic rather than static, allowing different rows to have different integration durations. This dynamic adjustment enables the system to adapt to varying lighting conditions across the scene, achieving HDR capability while the control circuitry manages the precision requirements through synchronized timing mechanisms.
3Productivity
If multiple readout circuitries are used for concurrent readout, then frame rate is improved, but area consumption increases
Solution Approach 1:
The sensor is segmented into multiple row groups, each served by dedicated readout circuitry. This segmentation enables parallel processing of multiple rows simultaneously, improving frame rate. The modular approach distributes the readout functionality across the sensor area, achieving high productivity while managing area consumption through efficient spatial organization.
Solution Approach 2:
The readout circuitry is designed with multi-functionality to handle multiple rows concurrently. By making the readout paths universal and reusable across different row groups, the system achieves high frame rates without requiring a proportional increase in total circuit area, as each circuit can serve multiple functions across different time slots and row groups.
Data Source
AI summary
An arithmetic counter circuit for high performance CMOS image sensors includes a plurality of flip-flops of a plurality of counter stages and a plurality of multiplexers of the plurality of counter stages being coupled to the plurality of flip-flops. Each of the plurality of multiplexers coupled to receive control signals including at least one of a toggle signal, a keep signal, a shift enable signal, or a mode signal. The control signals select the output of each of the plurality of multiplexers. Each of the plurality of flip-flops is coupled to be in one of a toggle state, a keep state, a reset state or a set state based on inputs received from the plurality of multiplexers. Other embodiments are described.