Counter-Timer Array for Autonomous Peripheral Signal Patterns
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing systems for generating control signals for peripheral devices, such as stepper motors and LEDs, either require processor involvement for software control or inflexible custom hardware, failing to optimize power usage and flexibility simultaneously.
Innovation Solution
An array of counter/timer modules with configuration registers and interconnection matrices allows for the generation of complex signal patterns without processor control, enabling arbitrary pulse widths and timings through independent operation of counter/timer units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the processor directly controls the signal on each pin, then total software control is achieved, but the processor must be active for each transition increasing power consumption
Solution Approach 1:
The system segments the control function by separating the processor from the actual signal generation. The processor only configures the counter/timer units and interconnection matrices, while these hardware components autonomously generate the control signals. This segmentation allows software control flexibility to be achieved without keeping the processor active for each signal transition, thereby reducing power consumption.
Solution Approach 2:
The counter/timer units and interconnection matrices serve as intermediary hardware components between the processor and the peripheral devices. These intermediaries handle the complex signal generation tasks, allowing the processor to remain inactive during signal transitions. The intermediary hardware is configured by software but operates independently, resolving the contradiction between software control and processor power consumption.
2Use of energy by moving object
If custom hardware implements the specific signal sequence, then processor activity is minimized, but the system becomes inflexible requiring application-specific circuits
Solution Approach 1:
The counter/timer units and interconnection matrices form a universal hardware platform that can generate various control signal patterns for different applications. Rather than designing application-specific circuits, the same hardware infrastructure can be reconfigured via software to implement different signal sequences, pulse widths, and timing patterns. This universality provides flexibility without requiring custom hardware for each application.
Solution Approach 2:
The system introduces dynamic reconfigurability through programmable counter/timer units and interconnection matrices. The hardware can be dynamically reconfigured via configuration registers to adapt to different signal generation requirements. This dynamic capability allows the system to transition between different operational modes and signal patterns without physical hardware changes, maintaining flexibility while using fixed hardware infrastructure.
3Reliability
If application-specific circuits are used, then signal patterns are optimized for specific devices, but device complexity increases
Solution Approach 1:
The system achieves application-specific optimization through parameter configuration rather than circuit redesign. Configuration registers allow precise control of signal parameters such as pulse width, frequency, duty cycle, and timing relationships. By changing these parameters programmatically, the system can be optimized for different peripheral devices without increasing hardware complexity. The same hardware infrastructure adapts to different applications through parameter adjustment.
Data Source
AI summary
A system includes an array of counter/timer units that execute a number of timing and pattern generation functions that are selectable by a processor to which the array is coupled. Counter/timer units may receive as inputs the outputs of other counter/timer units, such as for use as a trigger or clock input as instructed by the processor. Counter/timer units may be instructed to execute functions and be coupled to one another by a processor. The processor may then enable the counter/timer units such they subsequently produce complex outputs without additional inputs from the processor. The outputs of the counter/timer units may be used as interrupts to the processor or be used to drive a peripheral device.