Counter-Transitioning Waveforms for Non-Volatile Memory Programming

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Solution Overview

Problem

The programming process in non-volatile memory is hindered by capacitive coupling between neighboring word lines, leading to delayed verification and longer programming times due to ripple voltages caused by voltage transitions in neighboring word lines.

Innovation Solution

Applying counter-transitioning voltage waveforms to neighboring word lines, where one portion of the waveform increases while another decreases, to counteract capacitive coupling and reduce ripple effects, allowing for earlier verification and faster programming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If voltage transitions are applied to neighboring word lines during programming, then programming operation can proceed, but capacitive coupling causes ripple voltages that delay verification and increase programming time

Engineering Contradiction:
Improveprogramming speedVSAvoidverification delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary anti-action by transitioning neighboring word lines to intermediate voltages before the selected word line completes its programming transition. This preemptive action counteracts the capacitive coupling effect that would otherwise cause harmful ripple voltages, allowing verification to proceed immediately without delay while maintaining programming productivity

Inventive Principle:
Principle #9Preliminary anti-action

2Speed

If verification is performed immediately after programming voltage transition, then programming speed increases, but capacitive coupling from neighboring word lines causes inaccurate verification due to ripple voltages

Engineering Contradiction:
Improveverification speedVSAvoidverification accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies equipotentiality by transitioning neighboring word lines to intermediate voltages that create a stable electrical environment during the selected word line's programming transition. This reduces capacitive coupling effects and minimizes ripple voltages on the selected word line, enabling accurate and immediate verification without compromising verification accuracy while improving verification speed

Inventive Principle:
Principle #12Equipotentiality

3Productivity

If conventional voltage waveforms are used on neighboring word lines, then device operation is simple, but capacitive coupling reduces programming efficiency

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidwaveform control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by implementing dynamic voltage transitions on neighboring word lines that are synchronized with the programming operation on the selected word line. The intermediate voltage transitions are timed and controlled to match the programming progression, adaptively counteracting capacitive coupling effects throughout the programming process while maintaining manageable device complexity through coordinated waveform control

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces capacitive coupling, enabling sooner application of verify pulses and thereby decreasing the total time required for programming and verification, thus enhancing programming speed.

Implementation Method 1

voltage waveforms which are applied to neighboring word lines can be capacitively coupled to the selected word line on which programming occurs

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS7468921B2Method for increasing programming speed for non-volatile memory by applying direct-transitioning waveforms to word lines
Publication Date: 2008.12.23 SANDISK TECHNOLOGIES LLC
  • US7468921B2 patent drawing
  • US7468921B2 patent drawing
  • US7468921B2 patent drawing

AI summary

Non-volatile storage elements are programmed using counter-transitioning waveform portions on neighboring word lines which reduce capacitive coupling to a selected word line. In one approach, the waveform portions extend between pass or isolation voltages of a boosting mode, which are applied during a programming pulse on the selected word line, and read voltages, which are applied when verify pulses are applied to the selected word line to verify whether the storage elements have been programmed to a desired programming state. The waveform portions reduce the net voltage change which is coupled to the selected word line. The selected word line can reach a reduced, steady state level sooner so that the verify pulses can be applied sooner, thus reducing the overall programming time.