Coupled-Die Capacitor Layout for Ground Bounce Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor packaging technologies face challenges in achieving high component density and efficient decoupling capacitors without additional processing steps.
Innovation Solution
The formation of capacitors within semiconductor packages using hybrid bonding techniques with dummy bond pads, where the capacitors are integrated by coupling dies, allowing for increased density and improved performance without extra processing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decoupling capacitors are added to improve ground bounce in high-performance circuits, then device performance is improved, but manufacturing complexity increases due to additional processing steps
Solution Approach 1:
The patent merges the capacitor formation process with the existing bond pad structure by using dummy bond pads during hybrid bonding. The bond pads on opposing dies are configured to form capacitors when bonded together, eliminating the need for separate capacitor fabrication steps and integrating capacitor creation into the standard bonding workflow.
Solution Approach 2:
The dummy bond pads serve multiple functions: they provide mechanical alignment features during bonding while simultaneously forming decoupling capacitors when bonded. This multi-functionality allows the same structural elements to serve both bonding and capacitor creation purposes, reducing overall manufacturing complexity.
2Quantity of substance
If component density is increased to meet virtual machine and cloud computing demands, then package capacity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary alignment marker placement and bond pad configuration before the actual hybrid bonding process. By pre-configuring the dummy bond pads and alignment features on the dies, the system enables higher density packaging while maintaining manufacturing precision through established alignment procedures rather than requiring new high-precision techniques.
Data Source
AI summary
A capacitor includes a first die with a first side and a second side, wherein the first side of the first die includes a trace pattern. The capacitor also includes and a second die with a first side and a second side, wherein the first side of the second die includes the trace pattern. The first side of the first die and the first side of the second die are coupled to form a trace pattern of the capacitor, wherein the trace pattern of the capacitor comprises an interdigitated pattern, a first pad, and a second pad at an interface of the first side of the first die and the first side of the second die, the first pad at a first side of the interdigitated pattern, and the second pad at a second side of the interdigitated pattern, the second side laterally opposite the first side.