CPLD Firmware Update via Latching Signal Stabilization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Firmware updating in complex programmable logic devices (CPLDs) results in unstable output signals from controlling pins, leading to errors and unstable operations due to jittering voltage levels, affecting external circuits.
Innovation Solution
A method and apparatus for firmware updating that involves using a controller connected to the CPLD via JTAG, I2C, or GPIO interfaces to transmit latching signals at specific voltage levels, stabilizing the controlling signal output by locking or releasing the voltage level, ensuring stable operations during and after firmware updates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If firmware updating is performed in CPLD, then firmware can be updated, but the controlling pin output signal jitters causing unstable operation
Solution Approach 1:
The patent introduces a latching circuit as an intermediary component between the CPLD controlling pin and the external circuit. This latching circuit captures and holds the controlling pin's output signal, preventing jitter from propagating to external circuits. The latching circuit acts as a buffer that decouples the unstable firmware updating process from the external signal-dependent circuits, thereby maintaining signal stability during firmware updates.
2Productivity
If firmware updating is performed in CPLD, then firmware can be updated, but voltage level jitters causing errors in outputted data
Solution Approach 1:
The patent implements preliminary action by enabling the latching circuit before firmware updating begins. The latching circuit is pre-configured to capture the controlling pin signal at stable moments before jitter occurs during the updating process. By preparing the latching mechanism in advance and having it ready to immediately capture and hold signals, the system prevents voltage level jitters from corrupting output data during the firmware update operation.
Data Source
AI summary
A method of updating firmware in a chip in a stable and effective manner receives firmware outputted by a controller. The received firmware is burned into the chip. A voltage level of a controlling signal outputted by a controlling pin of the chip is latched to a certain level based on a latching signal at a first voltage level outputted by the controller. The storage medium is refreshed for making the burned firmware effective based on refresh instruction outputted by the controller. The latching signal at a second voltage level for unlatching the voltage level of the controlling signal is outputted by the controller if operations of the chip are stable. An updating operation of the chip by the method does not interrupt other operations being executed by the chip. A firmware updating apparatus and a computer readable storage medium applying the method are also disclosed.